EVAL-AD7859CB View Datasheet(PDF) - Analog Devices
Part Name
Description
MFG CO.
'EVAL-AD7859CB' PDF : 28 Pages View PDF
AD7859/AD7859L
CONVST
BUSY
START CONVERSION ON RISING EDGE
POWER UP ON FALLING EDGE
5µs
4.6µs
tCONVERT
POWER-UP NORMAL
FULL
POWER-UP
TIME
OPERATION POWER-DOWN
TIME
Figure 21. Using the CONVST Pin to Power Up the AD7859
for a Conversion
Using The Internal (On-Chip) Reference
As in the case of an external reference, the AD7859/AD7859L
can power up from one of two conditions, power-up after the
supplies are connected or power-up from hardware/software
power-down.
When using the on-chip reference and powering up when AVDD
and DVDD are first connected, it is recommended that the
power-up calibration mode be disabled as explained above.
When using the on-chip reference, the power-up time is effec-
tively the time it takes to charge up the external capacitor on the
REFIN/REFOUT pin. This time is given by the equation:
tUP = 9 × R × C
where R ≈ 150K and C = external capacitor.
The recommended value of the external capacitor is 100 nF;
this gives a power-up time of approximately 135 ms before a
calibration is initiated and normal operation should commence.
When CREF is fully charged, the power-up time from a hardware
or software power-down reduces to 5 µs. This is because an in-
ternal switch opens to provide a high impedance discharge path
for the reference capacitor during power-down—see Figure 22.
An added advantage of the low charge leakage from the refer-
ence capacitor during power-down is that even though the refer-
ence is being powered down between conversions, the reference
capacitor holds the reference voltage to within 0.5 LSBs with
throughput rates of 100 samples/second and over with a full
power-down between conversions. A high input impedance op
amp like the AD707 should be used to buffer this reference
capacitor if it is being used externally. Note, if the AD7859/
AD7859L is left in its powered-down state for more than
100 ms, the charge on CREF will start to leak away and the
power-up time will increase. If this long power-up time is a
problem, the user can use a partial power-down for the last con-
version so the reference remains powered up.
SWITCH OPENS
DURING POWER-DOWN
REFIN/OUT
EXTERNAL
CAPACITOR
ON-CHIP
REFERENCE
BUF
TO OTHER
CIRCUITRY
POWER VS. THROUGHPUT RATE
The main advantage of a full power-down after a conversion is
that it significantly reduces the power consumption of the part
at lower throughput rates. When using this mode of operation,
the AD7859/AD7859L is only powered up for the duration of
the conversion. If the power-up time of the AD7859/AD7859L
is taken to be 5 µs and it is assumed that the current during
power up is 4.5 mA/1.5 mA typ, then power consumption as a
function of throughput can easily be calculated. The AD7859
has a conversion time of 4.6 µs with a 4 MHz external clock and
the AD7859L has a conversion time of 9 µs with a 1.8 MHz
clock. This means the AD7859/AD7859L consumes 4.5 mA/
1.5 mA typ for 9.6 µs/14 µs in every conversion cycle if the parts
are powered down at the end of a conversion. The two graphs,
Figure 24 and Figure 25, show the power consumption of the
AD7859 and AD7859L for VDD = 3 V as a function of through-
put. Table VIII lists the power consumption for various
throughput rates.
Table VIII. Power Consumption vs. Throughput
Throughput Rate
Power
AD7859
Power
AD7859L
1 kSPS
10 kSPS
20 kSPS
50 kSPS
130 µW
1.3 mW
2.6 mW
6.48 mW
65 µW
650 µW
1.25 mW
3.2 mW
ANALOG
SUPPLY
+3V
CURRENT,
I = 1.5mA TYP
10µF
0.1µF
0.1µF
1.8MHz
OSCILLATOR
0V TO 2.5V
INPUT
0.1µF
0.01µF
DVDD
AVDD DVDD
W/B
AIN(+)
CLKIN
AIN(–)
CONVST
CREF1
CS
AD7859L RD
CREF2
WR
SLEEP
CAL
BUSY
DB0
AGND
DGND
REFIN/REFOUT
DB15
CONVERSION
START SIGNAL
LOW
POWER
µC/µP
OPTIONAL
EXTERNAL
REFERENCE
REF192
0.1µF
Figure 23. Typical Low Power Circuit
Figure 22. On-Chip Reference During Power-Down
REV. A
–19–
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