EVAL-AD7863CB View Datasheet(PDF) - Analog Devices
Part Name
Description
MFG CO.
'EVAL-AD7863CB' PDF : 24 Pages View PDF
AD7863
APPLICATIONS HINTS
PC BOARD LAYOUT CONSIDERATIONS
The AD7863 is optimally designed for lowest noise performance,
both radiated and conducted noise. To complement the
excellent noise performance of the AD7863 it is imperative that
great care be given to the PC board layout. Figure 26 shows a
recommended connection diagram for the AD7863.
GROUND PLANES
The AD7863 and associated analog circuitry should have a
separate ground plane, referred to as the analog ground plane
(AGND). This analog ground plane should encompass all
AD7863 ground pins (including the DGND pin), voltage
reference circuitry, power supply bypass circuitry, the analog
input traces, and any associated input/buffer amplifiers.
The regular PCB ground plane (referred to as the DGND for
this discussion) area should encompass all digital signal traces,
excluding the ground pins, leading up to the AD7863.
POWER PLANES
The PC board layout should have two distinct power planes,
one for analog circuitry and one for digital circuitry. The analog
power plane should encompass the AD7863 (VDD) and all
associated analog circuitry. This power plane should be
connected to the regular PCB power plane (VCC) at a single
point, if necessary through a ferrite bead, as illustrated in
Figure 26. This bead (part numbers for reference:
Fair-Rite 274300111 or Murata BL01/02/03) should be located
within three inches of the AD7863.
The PCB power plane (VCC) should provide power to all digital
logic on the PC board, and the analog power plane (VDD) should
provide power to all AD7863 power pins, voltage reference
circuitry and any input amplifiers, if needed. A suitable low
noise amplifier for the AD7863 is the AD797, one for each
input. Ensure that the +VS and the −VS supplies to each
amplifier are individually decoupled to AGND.
The PCB power (VCC) and ground (DGND) should not overlay
portions of the analog power plane (VDD). Keeping the VCC
power and the DGND planes from overlaying the VDD contributes
to a reduction in plane-to-plane noise coupling.
SUPPLY DECOUPLING
Noise on the analog power plane (VDD) can be further reduced
by use of multiple decoupling capacitors (Figure 26).
Optimum performance is achieved by the use of disc ceramic
capacitors. The VDD and reference pins (whether using an
external or an internal reference) should be individually
decoupled to the analog ground plane (AGND). This should be
done by placing the capacitors as close as possible to the
AD7863 pins with the capacitor leads as short as possible, thus
minimizing lead inductance.
TEMP
0.1µF
+15V
0.1µF
+VS
VA1
VB1
VIN
AD780
VOUT
0.1µF
0.1µF
VDD
VREF
AGND
DGND
AGND
VA1
0.1µF
L
(FERRITE BEAD)
10µF
AD7863
VB1
47µF
ANALOG
SUPPLY
+5V
VA2
VA2
VB2
VB2
–VS
4 × AD797s
0.1µF
ANALOG
SUPPLY
–15V
Figure 26. Typical Connections Diagram Including the Relevant Decoupling
Rev. B | Page 20 of 24
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