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EVAL-AD7949EDZ View Datasheet(PDF) - Analog Devices

Part Name
Description
MFG CO.
EVAL-AD7949EDZ
ADI
Analog Devices ADI
'EVAL-AD7949EDZ' PDF : 32 Pages View PDF
Data Sheet
AD7949
CNV
tDATA
> tCONV
tCONV
tCYC
EOC
RETURN CNV HIGH
FOR NO BUSY
tACQ
tCNVH
tCONV
tDATA
EOC
RETURN CNV HIGH
FOR NO BUSY
ACQUISITION
(n - 1)
SCK
DIN
SDO
CONVERSION (n – 1)
tSCKH
tSCK
12
13
14/
28
tSCKL
CFG
LSB
X
X
tEN END CFG (n)
LSB
(QUIET
TIME)
UPDATE (n)
CFG/SDO
tCLSCK
tEN
ACQUISITION (n)
1
2
tSDIN
tHDIN
CFG CFG
MSB MSB – 1
BEGIN CFG (n + 1)
ttHDSSDDOO
MSB
CONVERSION (n)
SEE NOTE
12
13 14/
28
(QUIET
TIME)
UPDATE (n + 1)
CFG/SDO
CFG
LSB
X
X
tEN
END CFG (n + 1)
SEE NOTE
LSB
tDIS
END DATA (n – 2)
tDIS
BEGIN DATA (n – 1)
tDIS
END DATA (n – 1)
tDIS
NOTES
1. THE LSB IS FOR CONVERSION RESULTS OR THE CONFIGURATION REGISTER CFG (n – 1) IF
13 SCK FALLING EDGES = LSB OF CONVERSION RESULTS.
27 SCK FALLING EDGES = LSB OF CONFIGURATION REGISTER.
ON THE 14TH OR 28TH SCK FALLING EDGE, SDO IS DRIVEN TO HIGH IMPEDANCE.
Figure 40. Serial Interface Timing for the AD7949 Without a Busy Indicator
Rev. F | Page 29 of 32
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