EVAL-AD7983SDZ View Datasheet(PDF) - Analog Devices

Part Name

Description

MFG CO.

EVAL-AD7983SDZ

16-Bit, 1.33 MSPS PulSAR ADC in MSOP/QFN

Analog Devices 

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AD7983

CHAIN MODE WITHOUT BUSY INDICATOR

This mode can be used to daisy-chain multiple AD7983s on a

3-wire serial interface. This feature is useful for reducing

component count and wiring connections, for example, in

isolated multiconverter applications or for systems with a

limited interfacing capacity. Data readback is analogous to

clocking a shift register.

A connection diagram example using two AD7983s is shown in

Figure 33, and the corresponding timing is given in Figure 34.

Data Sheet

When SDI and CNV are low, SDO is driven low. With SCK

low, a rising edge on CNV initiates a conversion, selects the

chain mode, and disables the busy indicator. In this mode,

CNV is held high during the conversion phase and the

subsequent data readback. When the conversion is complete,

the MSB is output onto SDO and the AD7983 enters the

acquisition phase and goes into standby mode. The remaining

data bits stored in the internal shift register are clocked by

subsequent SCK falling edges. For each ADC, SDI feeds the

input of the internal shift register and is clocked by the SCK

falling edge. Each ADC in the chain outputs its data MSB first,

and 16 × N clocks are required to readback the N ADCs. The

data is valid on both SCK edges. Although the rising edge can

be used to capture the data, a digital host using the SCK falling

edge allows a faster reading rate and, consequently, more

AD7983s in the chain, provided the digital host has an

acceptable hold time. The maximum conversion rate can be

reduced due to the total readback time.

CNV

SDI AD7983 SDO

A

SCK

CNV

SDI AD7983 SDO

B

SCK

CONVERT

DIGITAL HOST

DATA IN

CLK

Figure 33. Chain Mode Without Busy Indicator Connection Diagram

SDIA = 0

CNV

ACQUISITION

SCK

tHSCKCNV

SDOA = SDIB

SDOB

tCYC

tCONV

CONVERSION

tSSCKCNV

tEN

tACQ

tSCKL

ACQUISITION

tSCK

1

2

3

14

15

16

17

18

30

tSSDISCK

tHSDISCK

tSCKH

DA15

tHSDO

DB15

DA14 DA13

tDSDO

DB14 DB13

DA1 DA0

DB1

DB0 DA15 DA14

Figure 34. Chain Mode Without Busy Indicator Serial Interface Timing

31

32

DA1

DA0

Rev. C | Page 22 of 25

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