EVAL-ADE7753EB View Datasheet(PDF) - Analog Devices
Part Name
Description
MFG CO.
'EVAL-ADE7753EB' PDF : 38 Pages View PDF
ADE7753
V2P
V2
V2N
×1, ×2, ×4,
×8, ×16
2.42V
REFERENCE
{GAIN [7:5]}
PGA2
ADC 2
LPF1
ANALOG
INPUT RANGE
V1
0.5V, 0.25, 0.125,
62.5mV, 31.25mV
0V
LPF OUTPUT
WORD RANGE
0x2852
0x2581
0x0000
ACTIVE AND REACTIVE
ENERGY CALCULATION
VRMS CALCULATION
AND WAVEFORM
SAMPLING
(PEAK/SAG/ZX)
0xDAE8
0xD7AE
Figure 55. ADC and Signal Processing in Channel 2
02875-0-054
CHANNEL 2
VOLTAGE SIGNAL (V(t))
0x2518
0x0
0xDAE8
LPF1
LPF3
|x|
VRMOS[11:0]
sgn 29 28 22 21 20
VRMS[23:0]
0x17D338
++
0x00
Figure 56. Channel 2 RMS Signal Processing
02875-0-0055
Channel 2 has only one analog input range (0.5 V differential).
Like Channel 1, Channel 2 has a PGA with gain selections of 1,
2, 4, 8, and 16. For energy measurement, the output of the ADC
is passed directly to the multiplier and is not filtered. An HPF is
not required to remove any dc offset since it is only required to
remove the offset from one channel to eliminate errors due to
offsets in the power calculation. When in waveform sampling
mode, one of four output sample rates can be chosen by using
Bits 11 and 12 of the mode register. The available output sample
rates are 27.9 kSPS, 14 kSPS, 7 kSPS, or 3.5 kSPS—see the Mode
Register (0x09) section. The interrupt request output IRQ
signals that a sample is available by going active low. The timing
is the same as that for Channel 1, as shown in Figure 52.
Channel 2 RMS Calculation
Figure 56 shows the details of the signal processing chain for the
rms estimation on Channel 2. This Channel 2 rms estimation is
done in the ADE7753 using the mean absolute value calculation, as
shown in Figure 56. The Channel 2 rms value is processed from
the samples used in the Channel 2 waveform sampling mode.
The rms value is slightly attenuated because of LPF1. Channel 2
rms value is stored in the unsigned 24-bit VRMS register. The
update rate of the Channel 2 rms measurement is CLKIN/4.
With the specified full-scale ac analog input signal of 0.5 V, the
output from the LPF1 swings between 0x2518 and 0xDAE8 at
60 Hz—see the Channel 2 ADC section. The equivalent rms
value of this full-scale ac signal is approximately 1,561,400
(0x17D338) in the VRMS register. The voltage rms measure-
ment provided in the ADE7753 is accurate to within ±0.5% for
signal input between full scale and full scale/20. Table 8 shows
the settling time for the VRMS measurement, which is the time
it takes for the rms register to reflect the value at the input to
the voltage channel. The conversion from the register value to
volts must be done externally in the microprocessor using a
volts/LSB constant. Since the low-pass filtering used for
calculating the rms value is imperfect, there is some ripple noise
from 2ω term present in the rms measurement. To minimize
the noise effect in the reading, synchronize the rms reading
with the zero crossings of the voltage input.
Table 8.
95%
220 ms
100%
670 ms
Channel 2 RMS Offset Compensation
The ADE7753 incorporates a Channel 2 rms offset compensation
register (VRMSOS). This is a 12-bit signed register that can be
used to remove offset in the Channel 2 rms calculation. An
offset could exist in the rms calculation due to input noises and
dc offset in the input samples. The offset calibration allows the
contents of the VRMS register to be maintained at 0 when no
voltage is applied. One LSB of the Channel 2 rms offset is
equivalent to one LSB of the rms register. Assuming that the
maximum value from the Channel 2 rms calculation is
1,561,400d with full-scale ac inputs, then one LSB of the
Channel 2 rms offset represents 0.064% of measurement
error at –60 dB down of full scale.
VRMS = VRMS0 + VRMSOS
(6)
where VRMS0 is the rms measurement without offset correction.
The voltage rms offset compensation should be done by testing
the rms results at two non-zero input levels. One measurement
can be done close to full scale and the other at approximately
full scale/10. The voltage offset compensation can be derived
Rev. C | Page 26 of 60
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