ADT7490
Table 12. PECI Error Indicators
PECI Data Description
0x8000 to
0x8003
PECI data error
Invalid FCS
PECI communications
error
Action
Bit 1 of Register 0x43
is set to 1
Bit 2 of Register 0x43
is set to 1
Each PECI channel also has an associated status bit to indicate
if the PECI high or low limits have been exceeded. An alert is
generated on the SMBALERT pin when these status bits are
asserted.
Table 13. PECI Status Bits
Channel
Register
Bit
PECI0
0x43
0
PECI1
0x81
3
PECI2
0x81
4
PECI3
0x81
5
Temperature Data REPLACE Mode
The REPLACE mode is configured by setting Bit 4 of Register
0x36. In this mode, the data in the existing Remote 1 registers
are replaced by PECI0 data. This is a legacy mode that allows
the thermal data from CPU1 to be stored in the same registers
as in the ADT7476A. This reduces the software changes in
systems transitioning from CPUs with thermal diodes to CPUs
with a PECI interface. However, note that even though the
associated registers are swapped, the correct data format (PECI
vs. absolute temperature, see Table 6) must be written to and
interpreted from these registers.
Notes
In Table 14, registers listed under the Remote 1 Default column
are in absolute temperature format by default and are in PECI
format in REPLACE mode. Registers listed under the PECI0
Default column are in PECI format by default and in absolute
temperature format in REPLACE mode.
Table 14. Replace Mode Temperature Registers
Register Name
Remote 1 Default PECI0 Default
Value Register
Reg. 0x25
Reg. 0x33
Low Limit
Reg. 0x4E
Reg. 0x34
High Limit
Reg. 0x4F
Reg. 0x35
TMIN
TRANGE
Reg. 0x67
Reg. 0x3B
Reg. 0x5F, Bits [7:4] Reg. 0x3C, Bits [7:4]
Enhanced Acoustics Reg. 0x62, Bits [2:0] Reg. 0x3C, Bits [2:0]
Enhanced Acoustics
Enable
Reg. 0x62, Bit 3
Reg. 0x3C, Bit 3
THERM TCONTROL
Reg. 0x6A
Reg. 0x3D
TMIN Hysteresis
Reg. 0x6D, Bits [7:4] Reg. 0x6E, Bits [3:0]
Reg. 0x6D, Bits [3:0]1 Reg. 0x6E, Bits [7:4]1
Temperature offset Reg. 0x70
Reg. 0x94
Operating Point for
Dynamic TMIN
Reg. 0x8B
Reg. 0x8A
1 In REPLACE mode, the Remote 2 and local temperature hysteresis values are
swapped.
In REPLACE mode, the temperature zone controlling the
relevant PWM output are also swapped from Remote 1 to
PECI0. The swap of control only occurs if the default behavior
setting for Register 0x5C Bits [7:5], Register 0x5D Bits [7:5] or
Register 0x5E Bits [7:5] is 000.
Local Temperature Measurement
The ADT7490 contains an on-chip band gap temperature
sensor whose output is digitized by the on-chip 10-bit ADC.
The 8-bit MSB temperature data is stored in the local tempera-
ture register (Address 0x26). Because both positive and negative
temperatures can be measured, the temperature data is stored in
Offset 64 format or twos complement format, as shown in Table 15
and Table 16. Theoretically, the temperature sensor and ADC
can measure temperatures from −63°C to +127°C (or −63°C to
+191°C in the extended temperature range) with a resolution of
0.25°C. However, this exceeds the operating temperature range
of the device, so local temperature measurements outside the
ADT7490 operating temperature range are not possible.
Table 15. Twos Complement Temperature Data Format
Temperature
Digital Output (10-Bit)1
–128°C
1000 0000 00 (diode fault)
–63°C
1100 0001 00
–50°C
1100 1110 00
–25°C
1110 0111 00
–10°C
1111 0110 00
0°C
0000 0000 00
10.25°C
0000 1010 01
25.5°C
0001 1001 10
50.75°C
0011 0010 11
75°C
0100 1011 00
100°C
0110 0100 00
125°C
0111 1101 00
127°C
0111 1111 00
1 Bold numbers denote 2 LSBs of measurement in the Extended Resolution 2
register (Register 0x77) with 0.25°C resolution.
Table 16. Offset 64 Data Format
Temperature
Digital Output (10-Bit)1
–64°C
0000 0000 00 (diode fault)
–63°C
0000 0001 00
–1°C
0011 1111 00
0°C
0100 0000 00
1°C
0100 0001 00
10°C
0100 1010 00
25°C
0101 1001 00
50°C
0111 0010 00
75°C
1000 1001 00
100°C
1010 0100 00
125°C
1011 1101 00
191°C
1111 1111 00
1 Bold numbers denote 2 LSBs of measurement in the Extended Resolution 2
register (Register 0x77) with 0.25°C resolution.
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