EVAL-ADT7X20EBZ View Datasheet(PDF) - Analog Devices
Part Name
Description
MFG CO.
'EVAL-ADT7X20EBZ' PDF : 25 Pages View PDF
Data Sheet
REGISTERS
The ADT7320 contains eight registers:
• A status register
• A configuration register
• Five temperature registers
• An ID register
The status register, temperature value register, and the ID
register are read only.
Table 6. ADT7320 Registers
Register Address Description
0x00
Status
0x01
Configuration
0x02
Temperature value
0x03
ID
0x04
TCRIT setpoint
0x05
THYST setpoint
0x06
THIGH setpoint
0x07
TLOW setpoint
Power-On Default
0x80
0x00
0x0000
0xC3
0x4980 (147°C)
0x05 (5°C)
0x2000 (64°C)
0x0500 (10°C)
ADT7320
STATUS REGISTER
This 8-bit read-only register (Register Address 0x00) reflects the
status of the overtemperature and undertemperature interrupts
that can cause the CT and INT pins to become active. It also
reflects the status of a temperature conversion operation. The
interrupt flags in this register are reset by a read operation to
the status register and/or when the temperature value returns
within the temperature limits including hysteresis. The RDY bit is
reset after a read from the temperature value register. In one-
shot and 1 SPS modes, the RDY bit is reset after a write to the
operation mode bits in the configuration register.
Table 7. Status Register (Register Address 0x00)
Default
Bit(s) Value
Type Name Description
[3:0] 0000
R
Unused Reads back 0.
[4] 0
R
TLOW
This bit is set to 1 when the temperature goes below the TLOW temperature limit. The bit is cleared to
0 when the status register is read and/or when the temperature measured rises above the limit set
in the TLOW + THYST setpoint registers.
[5] 0
R
THIGH
This bit is set to 1 when the temperature rises above the THIGH temperature limit. This bit is cleared
to 0 when the status register is read and/or when the temperature measured drops below the limit
set in the THIGH − THYST setpoint registers.
[6] 0
R
TCRIT
This bit is set to 1 when the temperature rises above the TCRIT temperature limit. This bit is cleared to
0 when the status register is read and/or when the temperature measured drops below the limit set
in the TCRIT − THYST setpoint registers.
[7] 1
R
RDY
This bit goes low when the temperature conversion result is written to the temperature value
register. It is reset to 1 when the temperature value register is read. In one-shot and 1 SPS modes,
this bit is reset after a write to the operation mode bits in the configuration register.
Rev. 0 | Page 13 of 24
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