EVAL-ADV7614EB1Z View Datasheet(PDF) - Analog Devices
Part Name
Description
MFG CO.
'EVAL-ADV7614EB1Z' PDF : 20 Pages View PDF
Data Sheet
Pin No.
D11
D12
D13
D14
D15
D16
D17
D18
E1
E2
E3
E4
E15
E16
E17
E18
F1
F2
Mnemonic
CVDD
DDCB_SDA
DDCB_SCL
DDCA_SCL
DDCA_SDA
TVDD
RXA_0+
RXA_0−
DE
CEC
NC
NC
GND
GND
RXA_C+
RXA_C−
HS
VS_FIELD
F3
EP_MISO
F4
EP_MOSI
F15
GND
F16
CVDD
F17
TVDD
F18
GND
G1
P1
G2
P0
G3
EP_CS
G4
EP_SCK
G7
GND
G8
GND
G9
GND
G10
GND
G11
PVDD
G12
PVDD
G15
NC
G16
NC
G17
TEST1
G18
TEST2
H1
P3
H2
P2
H3
NC
H4
NC
H7
GND
H8
GND
H9
GND
H10
GND
H11
GND
H12
GND
H15
XTALP
H16
PVDD
ADV7614
Type
Power
HDMI input
HDMI input
HDMI input
HDMI input
Power
HDMI input
HDMI input
Digital video output
Digital I/O
No connect
No connect
Ground
Ground
HDMI input
HDMI input
Digital video output
Digital video output
Digital input
Digital output
Ground
Power
Power
Ground
Digital video output
Digital video output
Digital output
Digital output
Ground
Ground
Ground
Ground
Power
Power
No connect
No connect
Test
Test
Digital video output
Digital video output
No connect
No connect
Ground
Ground
Ground
Ground
Ground
Ground
Miscellaneous analog
Power
Description
Comparator Supply Voltage (1.8 V ).
HDCP Slave Serial Data Port B. DDCB_SDA is a 3.3 V input that is 5 V tolerant.
HDCP Slave Serial Clock Port B. DDCB_SCL is a 3.3 V input that is 5 V tolerant.
HDCP Slave Serial Clock Port A. DDCA_SCL is a 3.3 V input that is 5 V tolerant.
HDCP Slave Serial Data Port A. DDCA_SDA is a 3.3 V input that is 5 V tolerant.
Terminator Supply Voltage (3.3 V ).
Digital Input Channel 0 True of Port A in the HDMI Interface.
Digital Input Channel 0 Complement of Port A in the HDMI Interface.
Data Enable. DE is a signal that indicates active pixel data.
Consumer Electronic Control Channel.
Do Not Connect.
Do Not Connect.
Ground.
Ground.
Digital Input Clock True of Port A in the HDMI Interface.
Digital Input Clock Complement of Port A in the HDMI Interface.
Horizontal Synchronization Output Signal in the HDMI Processor.
VS is a vertical synchronization output signal in the HDMI processor. FIELD is a
field synchronization output signal in all interlaced video modes. VS or FIELD
can be configured for this pin.
SPI Master Input/Slave Output for External EDID Interface.
SPI Master Output/Slave Input for External EDID Interface.
Ground.
Comparator Supply Voltage (1.8 V ).
Terminator Supply Voltage (3.3 V ).
Ground.
Video Pixel Output Port.
Video Pixel Output Port.
SPI Chip Select for External EDID Interface.
SPI Clock for External EDID Interface.
Ground.
Ground.
Ground.
Ground.
PLL Supply Voltage (1.8 V ).
PLL Supply Voltage (1.8 V ).
Do Not Connect.
Do Not Connect.
Connect to GND through a 10 kΩ resistor.
Connect to GND through a 10 kΩ resistor.
Video Pixel Output Port.
Video Pixel Output Port.
Do Not Connect.
Do Not Connect.
Ground.
Ground.
Ground.
Ground.
Ground.
Ground.
This is the input pin for the 28.6363 MHz crystal, or it can be overdriven by an
external 1.8 V, 28.6363 MHz clock oscillator source to clock the ADV7614. A
crystal frequency of 24.576 MHz is also supported.
PLL Supply Voltage (1.8 V ).
Rev. C | Page 11 of 20
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