AD7685
95
–105
94
SNR
93
–110
92
THD
91
–115
90
–10
1000
750
500
–8
–6
–4
–2
INPUT LEVEL (dB)
Figure 19. SNR and THD vs. Input Level
–120
0
VDD
fS = 100kSPS
250
VIO
0
2.3 2.7 3.1 3.5 3.9 4.3 4.7 5.1 5.5
SUPPLY (V)
Figure 20. Operating Currents vs. Supply
1000
750
500
250
VDD + VIO
0
–55 –35 –15
5 25 45 65
TEMPERATURE (°C)
85 105 125
Figure 21. Power-Down Currents vs. Temperature
1000
750
500
VDD = 5V
VDD = 2.5V
fS = 100kSPS
250
VIO
0
–55 –35 –15
5 25 45 65
TEMPERATURE (°C)
85 105 125
Figure 22. Operating Currents vs. Temperature
6
5
4
3
2
1
OFFSET ERROR
0
–1
–2
–3
GAIN ERROR
–4
–5
–6
–55 –35 –15
5 25 45 65
TEMPERATURE (°C)
85 105 125
Figure 23. Offset and Gain Error vs. Temperature
25
20
VDD = 2.5V, 85°C
15
VDD = 2.5V, 25°C
10
VDD = 5V, 85°C
5
VDD = 5V, 25°C
VDD = 3.3V, 85°C
VDD = 3.3V, 25°C
0
0
20
40
60
80
100
120
SDO CAPACITIVE LOAD (pF)
Figure 24. tDSDO Delay vs. Capacitance Load and Supply
Rev. C | Page 12 of 28