2.3.AC Characteristics
VDD=4.5~5.5V
Parameter
Symbol
Min.
Max.
Shift Clock Period
tWCK
71
-
Shift Clock “H” Pulse Width
tWCKH
23
-
Shift Clock “L” Pulse Width
tWCKL
23
-
Data Setup Time
tDS
10
-
Data Hold Time
tDH
20
-
Latch Pulse “H” Pulse Width
tWLPH
15
-
Shift Clock Rise to Latch Pulse Rise Time
tLD
0
-
Shift Clock Fall to Latch Pulse Fall Time
tSL
25
-
Latch Pulse Rise to Shift Clock Rise Time
tLS
25
-
Latch Pulse Fall to Shift Clock Rise Time
tLH
25
-
Input Signal Rise,Fall Time
tr, tf
-
50 Note.1
DISPOFF Removal Time
tSD
100
-
DISPOFF Enable Pulse Width
tWDL
1.2
-
Output Delay Time
tDL
-
200 Note.2
Note.1 : (tCK – twckll - twckl)/2 is the maximum in case of high speed operation.
Note.2 : CL=15pF
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
µs
ns
FLM
(NT7704)
LP
CP
D0~D3
DISPOFF
TDL
tWLPH
t SL
t LD
t LS
tr
tf
t WCK
tLH
t WCKH
t DS
t WCKL
t DH
LAST DATA
TOP DATA
t WDL
tSD
F-51477GNF-SLY-AA (AA) No. 2002-0239
OPTREX CORPORATION
Page 4/18