FDC37C93XAPM View Datasheet(PDF) - SMSC -> Microchip

Part Name

Description

MFG CO.

FDC37C93XAPM

Plug and Play Compatible Ultra I/O™ Controller with Soft Power Management

SMSC -> Microchip 

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Normal Floppy Mode

Normal mode. Register 3F3 contains only bits 0 and 1. When this register is read, bits 2 - 7 are a

high impedance.

DB7

DB6

DB5

DB4

DB3

DB2

DB1

DB0

REG 3F3 Tri-state Tri-state Tri-state Tri-state Tri-state Tri-state tape sel1 tape sel0

Enhanced Floppy Mode 2 (OS2)

Register 3F3 for Enhanced Floppy Mode 2 operation.

REG 3F3

DB7

Media

ID1

DB6

Media

ID0

DB5

DB4

Drive Type ID

DB3

DB2

DB1

DB0

Floppy Boot Drive tape sel1 tape sel0

For this mode, MEDIA_ID[1:0] pins are gated

into bits 6 and 7 of the 3F3 register. These two

bits are not affected by a hard or soft reset.

BIT 7 MEDIA ID 1 READ ONLY (Pin 19) (See

Table 7)

BIT 6 MEDIA ID 0 READ ONLY (Pin 20) (See

Table 8)

BIT 5 and 4 DRIVE TYPE ID - These bits

reflect two of the bits of L0-CRF1. Which

two bits these are depends on the last drive

selected in the Digital Output Register (3F2).

(See Table 9)

Note: L0-CRF1-B5 = Logical Device 0,

Configuration Register F1, Bit 5

BIT 3 and 2 FLOPPY BOOT DRIVE - These

bits reflect the value of L0-CRF1. Bit 3 = L0-

CRF1-B7. Bit 2 = L0-CRF1-B6.

BIT 1 AND 0 - TAPE DRIVE SELECT

(READ/WRITE). Same as in Normal and

Enhanced Floppy Mode. 1.

Table 7 - Media ID1

MEDIA ID1

INPUT

BIT 7

Pin 19

L0-CRF1-B5 L0-CRF1-B5

=0

=1

0

0

1

1

1

0

Table 8 - Media ID0

MEDIA ID0

INPUT

Pin 20

BIT 6

CRF1-B4

CRF1-B4

=0

=1

0

0

1

1

1

0

23

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