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FX663P3 View Datasheet(PDF) - CML Microsystems Plc

Part Name
Description
MFG CO.
FX663P3
CML
CML Microsystems Plc CML
'FX663P3' PDF : 17 Pages View PDF
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1.3 Signal List (continued)
Package
D4/P3
Signal
Pin No.
Name
10
Vss
11
SIGIN
12
VBIAS
13
AMPNINV
14
AMPINV
15
AMPOP
16
VDD
Description
Type
Power The negative supply rail (ground).
I/P Signal input. The signal to this pin should be ac
coupled. The dc bias of this pin is set internally.
O/P Internally generated bias voltage, held at VDD /2
when the device is not in powersave mode. It
should be decoupled to Vss by a capacitor
mounted close to the device pins. In powersave
mode this pin is pulled towards VSS.
I/P The non-inverting input to the on-chip amplifier.
I/P The inverting input to the on-chip amplifier.
O/P The output of the on-chip amplifier, this is
internally connected to the input of the Level
Detector.
Power
The positive supply rail. Levels and voltages are
dependent upon this supply. This pin should be
decoupled to VSS by a capacitor.
Notes: I/P = Input
O/P = Output
© 1999 Consumer Microcircuits Limited
5
D/663/3
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