GL800USB View Datasheet(PDF) - Genesys Logic
Part Name
Description
MFG CO.
'GL800USB' PDF : 23 Pages View PDF
GL800USB - USB2.0 UTMI COMPLIANT TRANSCEIVER
CRC. When transmitting, the SIE is always expected to present a PID as the first
byte of the data stream and if appropriate, CRC as the last bytes of the data stream.
The SIE must use LINEST0/1 to verify a Bus Idle condition before asserting TXVLD
in the TX Wait state.
6.1.2 Transmit Timing for Data Packet
CLKOUT
TXVLD
Data
TXRDY
DP/DM
PID
Data Data Data Data CRC CRC
SYNC
C C P PID Data Data Data Data CRC CRC EOP
The SIE negates TXVLD to complete a packet. Once negated, the Transmit State
Machine will never reassert TXRDY until after the EOP has been loaded into the Transmit
Shift Register. Note that the UTM Transmit State Machine can be ready to start another
package immediately, however the SIE must confirm to the minimum inter-packet delays
identified in the USB 2.0 Specification.
6.2 Receive Operation
6.2.1 Receive State Diagram
©2000-2001 Genesys Logic Inc.—All rights reserved.
Page 15 of 23
Share Link: 
