GL850A-MSNXX View Datasheet(PDF) - Genesys Logic
Part Name
Description
MFG CO.
'GL850A-MSNXX' PDF : 29 Pages View PDF
15 DP2
16 NC
GL850A USB 2.0 Low-Power HUB Controller
B 31 DM4
- 32 DP4
B 47 DVDD
P 63 AVDD
P
B
48
GREEN2/
EE_DO
B 64 AVDD
P
3.3 Pin Descriptions
Table 3.3 - Pin Descriptions
USB Interface
Pin Name
GL850A
I/O Type
48Pin# 64 Pin#
Description
DM0,DP0 3,4
3,4
B USB signals for USPORT
DM1,DP1 5,6
8,9
B USB signals for DSPORT1
DM2,DP2 9,10 14,15
B USB signals for DSPORT2
DM3,DP3 18,19 25,26
B USB signals for DSPORT3
DM4,DP4 22,23
RREF
11
31,32
17
B USB signals for DSPORT4
B
A 680Ω resister must be connected between RREF and
analog ground (AGND).
Note: USB signals must be carefully handled in PCB routing. For detailed information, please refer to
GL850A Design Guideline.
HUB Interface
Pin Name
GL850A
I/O Type
48Pin# 64 Pin#
Description
OVCUR1#~4 41
PWREN1#~4 42
GREEN1~4
45,35,
31,24
AMBER1~4
46,36,
32,25
EE_CS/
EE_DI
-
PSELF 37
PGANG/
SUSPND
40
56,54,
42,40
57,55,
43,41
60,48,
44,34
61,49,
45,35
-
50
53
I
(pu)
Active low. Over current indicator for DSPORT1~4
OVCUR1# is the only over current flag for GANG
mode.
Active low. Power enable output for DSPORT1~4
O PWREN1# is the only power-enable output for GANG
mode.
1,3,4: O Green LED indicator for DSPORT1~4
2: B *GREEN[1~2] are also used to access the external EEPROM
(pd) For detailed information, please refer to Chapter 5.
O Amber LED indicator for DSPORT1~4
(pd) *Amber[1~2] are also used to access the external EEPROM
I
Used to access the external EEPROM.
For detailed information, please refer to Chapter 5.
I
0: GL850A is bus-powered.
1: GL850A is self-powered.
This pin is default put in input mode after power-on
B reset. Individual/gang mode is strapped during this
period. After the strapping period, this pin will be set to
©2000-2007 Genesys Logic Inc. - All rights reserved.
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