GL852G-PMGXX View Datasheet(PDF) - Genesys Logic
Part Name
Description
MFG CO.
'GL852G-PMGXX' PDF : 38 Pages View PDF
GL852G Datasheet
5.2.8 Non-removable Port Configuration (Only Available for LQFP48/LQFN46 Package)
For compound application or embedded system, downstream ports that always connected inside the system
can be set as non-removable based on the state of corresponding status LED, pin GREEN 1~4. If the pin is
pull high in the initial stage (POR reset), the corresponding port will be set as non-removable. (Feature
Limitation: Green 1 & Green 2 pull-high concurrently will enable GL852G vendor proprietary function that
may affect system compatibility. System integrator should evade configuring both port #1 and #2 as
non-removable by this strapping feature)
5.2.9 Reference Clock Configuration (Only Available for LQFP48/LQFN46 Package)
GL852G can support optional 27/48MHz clock source, which is selectable through GPIO configurations.
For some on-board design that 27/48MHz clock source is available, such as motherboard or Monitor built-in
applications, system integrator can leverage this feature to further reduce BOM cost by removing external
crystal.
Table 5.3 - Ref. Clock Configuration
SEL48
0
1
1
SEL27
1
0
1
Clock Source
48MHz OSC-in
27MHz OSC-in
12MHz X’tal/OSC-in
©2012 Genesys Logic, Inc. - All rights reserved.
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