GS9035C View Datasheet(PDF) - Gennum -> Semtech
Part Name
Description
MFG CO.
'GS9035C' PDF : 14 Pages View PDF
400
350
300
250
200
150
100
50
0
0
200 400
600 800 1000 1200 1400 1600 1800
RVCO (Ω)
Fig. 15 Charge Pump Current vs. RVCO
9.4 Spice Simulations
More detailed analysis of the GS9035C PLL can be done
using SPICE. A SPICE model of the PLL is shown below:
PHII
V1
G1
IN+
IN-
RLF
1
CLF1
LF
PHIO
E1
2πKƒ
Ns
R2 CLF2
NOTE: PHII, PHIO, LF and 1 are node names in the SPICE netlist.
Fig. 16 SPICE Model of PLL
The model consists of a voltage controlled current source
(G1), the loop filter components (RLF, CLF1, and CLF2), a
voltage controlled voltage source (E1), and a voltage
source (V1). R2 is necessary to create a DC path to ground
for Node 1.
V1 is used to generate the input phase waveform. G1
compares the input and output phase waveforms and
generates the charge pump current, ΙCP. The loop filter
components integrate the charge pump current to establish
the loop filter voltage. E1 creates the output phase
waveform (PHIO) by multiplying the loop filter voltage by
the value of the Laplace transform (2pKƒ/Ns).
The netlist for the model is given below. The .PARAM
statements are used to set values for ΙCP, Kƒ, N, and D. ΙCP
is determined by the RVCO resistor and is obtained from
Figure 15.
SPICE NETLIST * GS9035C PLL Model
.PARAM ICP = 165E-6 KF= 90E+6
.PARAM N = 1 D = 0.5
.PARAM PI = 3.14
.IC V(Phio) = 0
.ac dec 30 1k 10meg
RLF 1 LF 1000
CLF1 1 0 15n
CLF2 0 LF 15p
E_LAPLACE1 Phio 0 LAPLACE {V(LF)} {(2*PI*KF)/(N*s)}
G1 0 LF VALUE{D * ICP/(2*pi)*V(Phii, Phio)}
V1 2 0 DC 0V AC 1V
R2 0 1 1g
.END
10. I/O DESCRIPTION
10.1 High Speed Inputs (DDI/DDI)
DDI/DDI are high impedance inputs which accept
differential or single-ended input drive. Two conditions must
be observed when interfacing to these inputs:
1. Input signal amplitudes are between 200 and 2000mV
2. The common mode input voltage range is as specified
in the DC Characteristics table.
Commonly used interface examples are shown in
Figures 17 and 18.
Figure 18 illustrates the simplest interface to the GS9035C.
In this example, the driving device generates the PECL
level signals (800mV amplitudes) having a common mode
input range between 0.4 and 4.6V. This scheme is
recommended when the trace lengths are less than 1in. The
value of the resistors and the DC connection (VCC or
Ground), depends on the output driver circuitry of the
previous device.
VCC or GND
DDI
GS9035C
DDI
VCC or GND
Fig. 17 Simple Interface to the GS9035C
GENNUM CORPORATION
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