HCPL-060L-500E View Datasheet(PDF) - Avago Technologies
Part Name
Description
MFG CO.
'HCPL-060L-500E' PDF : 20 Pages View PDF
PULSE GEN.
ZO = 50 Ω
tf = tr = 5 ns
INPUT VE
MONITORING NODE
1
7.5 mA
IF
2
3
4
VCC 8
7
6
5
GND
3.3V or 5V
0.1 μF
BYPASS
*CL
RL
OUTPUT VO
MONITORING
NODE
INPUT
VE
OUTPUT
VO
tEHL
tELH
3.0 V
1.5 V
1.5 V
*CL IS APPROXIMATELY 15 pF WHICH INCLUDES
PROBE AND STRAY WIRING CAPACITANCE.
Figure 9. Test circuit for tEHL and tELH.
IF
B
A
VFF
SINGLE CHANNEL
1
VCC 8
2
7
3
6
4
GND 5
IF
3.3V or 5V
0.1 μF
BYPASS
RL
OUTPUT VO
MONITORING
NODE
B
A
VFF
DUAL CHANNEL
1
VCC 8
2
7
3
6
4
GND 5
VCM
+–
PULSE
GENERATOR
ZO = 50 Ω
VCM
0V
VO 5 V
VO 0.5 V
VCM (PEAK)
SWITCH AT A: IF = 0 mA
VO (MIN.)
SWITCH AT B: IF = 7.5 mA
VO (MAX.)
CMH
VCM
+–
PULSE
GENERATOR
ZO = 50 Ω
CML
RL
0.1 μF
BYPASS
3.3V or 5V
OUTPUT VO
MONITORING
NODE
Figure 10. Test circuit for common mode transient immunity and typical waveforms.
VCC BUS (FRONT)
NC
NC
GND BUS (BACK)
0.1μF
ENABLE
OUTPUT
10 mm MAX.
(SEE NOTE 5)
Figure 11. Recommended printed circuit board layout.
17
SINGLE CHANNEL
DEVICE ILLUSTRATED.
Share Link: 
