HCPL-5300 View Datasheet(PDF) - Avago Technologies
Part Name
Description
MFG CO.
HCPL-5300
Avago Technologies
'HCPL-5300' PDF : 15 Pages View PDF
ILED1
+5 V
310
CMOS
ILED2
+5 V
310
CMOS
HCPL-5300
1
2
20 k
8
0.1 μF
7
3
6
4
5
SHIELD
HCPL-5300
1
2
20 k
8
0.1 μF
7
3
6
4
5
SHIELD
Figure 22. Typical application circuit
VCC1
20 k
VOUT1
VCC2
20 k
VOUT2
HCPL-5300
HCPL-5300
HCPL-5300
HCPL-5300
HCPL-5300
IPM
Q1
Q2
ILED1
VOUT1
VOUT2
Q1 ON
Q2 OFF
Q1 OFF
Q2 ON
ILED2
tPLH MAX.
tPHL
MIN.
PDD* MAX. =
(tPLH-tPHL) MAX. = tPLH MAX. - tPHL MIN.
*PDD = PROPAGATION DELAY DIFFERENCE
NOTE: THE PROPAGATION DELAYS USED TO CALCULATE
PDD ARE TAKEN AT EQUAL TEMPERATURES.
Figure 23. Minimum LED skew for zero dead time
+HV
M
-HV
14
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