14
ILED1
+5 V
310 Ω
CMOS
ILED2
+5 V
310 Ω
CMOS
HCPL-5300
1
2
20 kΩ
8
0.1 µF
7
3
6
4
5
SHIELD
HCPL-5300
1
2
20 kΩ
8
0.1 µF
7
3
6
4
5
SHIELD
VCC1
20 kΩ
VOUT1
VCC2
20 kΩ
VOUT2
HCPL-5300
HCPL-5300
HCPL-5300
HCPL-5300
HCPL-5300
Figure 22. Typical Application Circuit.
IPM
Q1
Q2
+HV
M
-HV
ILED1
VOUT1
VOUT2
Q1 ON
Q2 OFF
Q1 OFF
Q2 ON
ILED2
tPLH MAX.
tPHL
MIN.
PDD* MAX. =
(tPLH-tPHL) MAX. = tPLH MAX. - tPHL MIN.
*PDD = PROPAGATION DELAY DIFFERENCE
NOTE: THE PROPAGATION DELAYS USED TO CALCULATE
PDD ARE TAKEN AT EQUAL TEMPERATURES.
Figure 23. Minimum LED Skew for
Zero Dead Time.