HCPL-5500 View Datasheet(PDF) - Avago Technologies

Part Name

Description

MFG CO.

HCPL-5500

Hermetically Sealed, Transistor Output Optocouplers for Analog and Digital Applications

Avago Technologies 

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IF

B

RM

A

D.U.T.

VCC

+5 V

RL

VO

V FF

GND

SINGLE CHANNEL OR

COMMON VCC DEVICES

V CM

+-

PULSE GEN.

NOTE: BASE LEAD NOT CONNECTED.

Figure 10. Test Circuit for Transient Immunity and Typical Waveforms.

5V

V CC

220 Ω

TTL

D.U.T.

RL

V CC

GND

EACH CHANNEL

LOGIC GATE

0.01 μF

Figure 11. Recommended Logic Interface.

VCC

(EACH INPUT)

+-

VIN

D.U.T.*

VCC

VO

GND

VOC

0.1 μF

(EACH OUTPUT)

NOMINAL CONDITIONS

PER CHANNEL: IF = 20 mA

IO = 4 mA

ICC = 30 μA

NOTE: BASE LEAD NOT CONNECTED.

T A = +125 ˚C

Figure 12. Operating Circuit for Burn-In and Steady State Life Tests. All

Channels Tested Simultaneously.

Logic Family

Device No.

VCC

RL 5% Toler-

ance

LSTTL

54LS14

5V

18 k *

CMOS

CD40106BM

5V

15 V

8.2 k

22 k

*The equivalent output load resistance is affected by the LSTTL input

current and is approximately 8.2 kΩ. This is a worst case design

which takes into account 25% degradation of CTR. See App. Note

1002 to assess actual degradation and lifetime.

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