HCPL-7840-360E View Datasheet(PDF) - Avago Technologies
Part Name
Description
MFG CO.
'HCPL-7840-360E' PDF : 19 Pages View PDF
VDD1
0.1 µF
VDD2
1
8
0.1 µF
2
7
10 K
HCPL-7840
3
6
10 K
4
5
0.47
µF
+15 V
0.1 µF
+
– AD624CD
GAIN = 100
0.47 0.1 µF
µF
VOUT
-15 V
Figure 1. Input offset voltage test circuit.
0.8
0.39
vs. VDD1
0.7
0.38
vs. VDD2
0.6
0.37
0.5
0.36
0.4
0.35
0.3
0.34
0.2
-55 -25 5 35 65 95 125
TA – TEMPERATURE – °C
0.33
4.5
4.75
5.0
5.25
5.5
VDD – SUPPLY VOLTAGE – V
Figure 2. Input offset voltage vs. temperature. Figure 3. Input offset vs. supply.
8.035
8.03
8.025
8.02
8.015
8.01
-55 -35 -15 5 25 45 65 85 105 125
TA – TEMPERATURE – °C
Figure 4. Gain vs. temperature.
VDD1
404
VIN
1
0.1 µF
2
13.2
3
0.01 µF
4
HCPL-7840
VDD2
8
0.1 µF
7
10 K
6
10 K
5
0.47
µF
Figure 5. Gain and nonlinearity test circuit.
+15 V
0.1 µF
+15 V
0.1 µF
+
– AD624CD
GAIN = 4
0.47 0.1 µF
µF
-15 V
10 K
0.47
µF
+
– AD624CD
GAIN = 10
VOUT
0.1 µF
-15 V
11
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