HCPL-7850 View Datasheet(PDF) - HP => Agilent Technologies
Part Name
Description
MFG CO.
'HCPL-7850' PDF : 16 Pages View PDF
13
Applications Information
Functional Description
Figure 23 shows the primary
functional blocks of the HCPL-
7850. In operation, the sigma-
delta modulator converts the
analog input signal into a high-
speed serial bit stream. The time
average of this bit stream is
directly proportional to the input
signal. This stream of digital data
is encoded and optically
transmitted to the detector
circuit. The detected signal is
decoded and converted back into
an analog signal, which is filtered
to obtain the final output signal.
Application Circuit
The recommended application
circuit is shown in Figure 24. A
floating power supply (which in
many applications could be the
same supply that is used to drive
the high-side power transistor) is
regulated to 5 V using a simple
three-terminal voltage regulator
(U1). The voltage from the
current sensing resistor, or shunt
(Rsense), is applied to the input
of the HCPL-7850 through an RC
anti-aliasing filter (R5, C3). And
finally, the differential output of
the isolation amplifier is
converted to a ground-referenced
C5
150 pF
single-ended output voltage with
a simple differential amplifier
circuit (U3 and associated
components). Although the
application circuit is relatively
simple, a few recommendations
should be followed to ensure
optimal performance.
Supplies and Bypassing
As mentioned above, an
inexpensive three-terminal
regulator can be used to reduce
the gate-drive power supply
voltage to 5 V. To help attenuate
high frequency power supply
noise or ripple, a resistor or
1
2
U2
3
+5 V
+5 V
8
C4
R4A
20.0 K
0.1 µF
7
R1
10.0 K
6
R2
10.0 K
R3
10.0 K
+5 V
C8
0.1 µF
–
U3
+ MC34071
4
5
HCPL-7850
C6
150 pF
R4B
20.0 K
VOUT
R5
C2 C4
C3
Figure 26. Top Layer of Printed
Circuit Board Layout.
TO VDD1
TO RSENSE+
TO RSENSE–
TO VDD2
VOUT+
VOUT–
Figure 25. Single-Supply Post-Amplifier Circuit.
Figure 27. Bottom Layer of a Printed
Circuit Board Layout.
27 Ω
1
VDD
1k
2
+
VIN+
1k
3
–
VIN–
4
GND
27 Ω
8
VDD 1 k
+
7
VOUT+ 1 k
–
6
VOUT–
5
GND
0.1 µF
(+) VDD
(–) 5.5 VDC
CONDITIONS: ICC=17.5mA
TA=+125˚C
Figure 28. Operating Circuit for Burn-In and Steady State Life Tests.
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