HCS12COREUG View Datasheet(PDF) - Motorola => Freescale
Part Name
Description
MFG CO.
'HCS12COREUG' PDF : 124 Pages View PDF
MC9S12H256 Device User Guide — V01.14
3. XCLKS =1 during reset
A.4.3 Phase Locked Loop
The oscillator provides the reference clock for the PLL. The PLL´s Voltage Controlled Oscillator (VCO)
is also the system clock source in self clock mode.
A.4.3.1 XFC Component Selection
This section describes the selection of the XFC components to achieve a good filter characteristics.
VDDPLL
Cs
Cp
R
fosc
1
fref
refdv+1
Phase
∆
KΦ
VCO
KV
fvco
Detector
fcmp
Loop Divider
1
1
synr+1
2
Figure A-2 Basic PLL functional diagram
The following procedure can be used to calculate the resistance and capacitance values using typical
values for K1, f1 and ich from Table A-15.
The VCO Gain at the desired VCO output frequency is approximated by:
KV = K1 ⋅ e-(--fK--1--1--–--⋅--f-1-v--c-V--o--)-
The phase detector relationship is given by:
KΦ = ich ⋅ KV
ich is the current in tracking mode.
103
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