HCTL-2022 View Datasheet(PDF) - Avago Technologies
Part Name
Description
MFG CO.
'HCTL-2022' PDF : 21 Pages View PDF
Interfacing the HCTL-2032 to an Atmel AVR 90S8535
The circuit shown in Figure 17 shows the connections be-
tween an HCTL-2032 and an Atmel AVR controller. Data
lines D0-D7 are connected to the Atmel AVR bus port.
The 8 MHz oscillators clock the Atmel AVR, whereas the
external 33 MHz oscillators clock the HCTL-2032. Figure
18 illustrates the program that interfaces with an Atmel
AVR 90S8535.
+5v
R= 2.7kOHM
R
R
R
5 CHB
4 VCC
3 CHA
2 CHI
1 GND
+5v
R= 2.7kOHM
R
R
R
5 CHB
4 VCC
3 CHA
2 CHI
1 GND
CHBX
CHAX
CHIX
CHBY
CHAY
CHIY
HCTL2032
D0
D1
D2
D3
D4
D5
D6
D7
SEL1
SEL2
EN1
EN2
OE
RSTX
RSTY
X/Y
Figure 17. An HCTL-2032-to-Atmel AVR Interface
PA0
PA1
PA2
PA3
PA4
PA5
PA6
PA7
PB1
PB3
PB4
PB5
PB0
PB2
PC7
PB6
AT90S8535
18
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