HSP50214B
TABLE 6C. AGC LIMIT DATA FORMAT
CONTROL WORD 9 BIT: 27
26
25
24
23
22
21
20
19
18
17
16
FORMAT e
e
e
e
m
m
m
m
m
m
m
m
SERIAL
16
OUT
16
μP
(11 MANTISSA
4 EXPONENT)
AGC LOOP FILTER
μP
AGC ERROR SCALING
(RANGE = -2.18344 TO 2.18344)
MSB = 0
M
U
+
X
MSB = 0
EN
AGC
LOAD
LIMIT
DET
UPPER LIMIT †
LOWER LIMIT †
13
EXP
4
AGCGNSEL
MANTISSA
4
AGC
ERROR
DETECTOR
13
Δ
20
26
IFIR
26
QFIR
4 EXP=2NNNN
16 MANTISSA =
01.XXXXXXXXXXXXXX
LIMIT
DET
18
18
18
IAGC
LIMIT
DET
18
QAGC
MAGNITUDE
(RANGE = 0 TO 2.3)
(RANGE = 0 TO 1)
RESAMPLING
FIR FILTERS
AND
INTERPOLATING
HALFBAND
FILTERS
CARTESIAN
TO
POLAR
COORDINATE
CONVERTER
(G = 1.64676)
AGC MULTIPLIER/SHIFTER
† Controlled via microprocessor interface.
FIGURE 23. AGC BLOCK DIAGRAM
Using AGC loop gain, the AGC range, and expected error
detector output, the gain adjustments per output sample for
the Loop Filter Section of the Digital AGC can be given by:
AGC Slew Rate = 1.5dB(THRESH – (MAG*1.64676) ) ×
(
ML
G
)(
2–4
)
⎛
⎝
–(15
2
–
EL
G
)⎞
⎠
(EQ. 18)
23
The loop gain determines the growth rate of the sum in the
loop accumulator which, in turn, determines how quickly the
AGC gain traces the transfer function given in Figures 21
and 22. Since the log of the gain response is roughly linear,
the loop response can be approximated by multiplying the
maximum AGC gain error by the loop gain. The expected
FN4450.4
May 1, 2007