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HSP50214BVC View Datasheet(PDF) - Intersil

Part Name
Description
MFG CO.
HSP50214BVC
Intersil
Intersil Intersil
'HSP50214BVC' PDF : 62 Pages View PDF
HSP50214B
I 16
Q 16
|r| 16
φ 16
ƒ 16
DUAL
PORT
RAM
I0
Q1
|r| 2
0
φ3
ƒ4
LSByte
0
R2 R1 R0 A2 A1 A0 SELECTION
0 0 0 0 0 0 RAM I LSB
0 0 0 0 0 1 RAM I MSB
0 0 0 0 1 0 RAM Q LSB
WRITE
“SET OF WORDS”
R1 R0 A1
0
SEQUENCER
ADDRESS
SEQUENCER
STATUS
1 R2 1
INCR
INCR
WR
RD
MSByte
A0
1
NEW
DATA
OUTPUT
DATA
0 0 0 0 1 1 RAM Q MSB
0 0 1 0 0 0 RAM |r| LSB
0 0 1 0 0 1 RAM |r| MSB
0 0 1 0 1 0 RAM φ LSB
0 0 1 0 1 1 RAM φ MSB
0 1 0 0 0 0 RAM ƒ LSB
0 1 0 0 0 1 RAM ƒ MSB
CONTROL
WORD 23
A(2:0)
RD
WRITE
ADDRESS “5”
R2, R1, R0
INT(15:0)
INT(22:16)
A2, A1, A0
AGC
0: I;Q (2’s COMP)
TIMING
1: |r|; φ (O; UNSIGNED BINARY; 2’s COMP)
2: ƒ (2’s COMPLEMENT)
4: INPUT AGC (O; UNSIGNED BINARY)
5: AGC; TIMING (O; UNSIGNED BINARY;
2’s COMP)
0
1
2
3
R0 A1
A2 A1 A0
0 1 1 X X X NOT USED
1 0 0 0 0 0 INPUT INTEG LSB
1 0 0 0 0 1 INPUT INTEG NMSB
1 0 0 0 1 0 INPUT INTEG MSB
1 0 1 0 0 0 AGC LSB
1 0 1 0 0 1 AGC MSB
1 0 1 0 1 0 TIMING LSB
1 0 1 0 1 1 TIMING MSB
1 1 X X X X NOT USED
X X X 1 1 1 STATUS
FIGURE 41. 8-BIT MICROPROCESSOR INTERFACE BUFFER RAM MODE BLOCK DIAGRAM
PROCCLK
DATARDY
(I/Q SELECTED)
DATARDY
(R/φ SELECTED)
I/Q R/φ
DELAY TO DATARDY DEPENDS ON LENGTH OF FIR IF FREQ CHOSEN
INTRRP
WRITES TO
SNAPSHOT
RAM
I
Q
R
φ
ƒ
FIGURE 42. RAM LOAD SEQUENCE
Snap Shot Operation
The snapshot mode takes sets of adjacent samples at
programmed intervals. It is provided for tracking algorithms
that do not require processing of every sample, but do
require sets of adjacent samples. For example, bit sync
algorithms have narrow loop bandwidths that may not need
to be updated every sample. Computing the bit phase may
require 4 adjacent samples at 2 times the baud rate. The
snapshot mode allows the processor to implement the
tracking algorithms for high speed data without having to
handle every data sample.
The interval from the start of one snapshot to the start of a
second snapshot is programmed into bits 11-4 (where bit 11
is the MSB) of Control Word 21. The actual interval is the
value programmed plus 1. If bits 11-4 = 11111111, then the
interval is set to 256. If sample sets are to be taken every 4
samples, then bits 11-4 = 00000011.
Figure 43 shows the relationship between the snapshot
samples and the snapshot interval.
ADJACENT
SAMPLES
01234
62 63 64 65
# SAMPLES = 4
INTERVAL = 64
FIGURE 43. SNAP SHOT SAMPLING
41
FN4450.4
May 1, 2007
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