HT32F1251B View Datasheet(PDF) - Holtek Semiconductor
Part Name
Description
MFG CO.
'HT32F1251B' PDF : 35 Pages View PDF
32-bit ARM Cortex™-M3 MCU
HT32F1251/51B/52/53
Pin
Name
Pins
48
LQFP
Type
(Note1)
IO
Level
(Note2)
Default function
(AF0)
Description
AF1
AF2
AF3
PB13 32
I/O
5V-T
GPIO PB13
SPI_SCK
UR_DSR
GT1_CH2
PB14 33
I/O
5V-T
GPIO PB14
SPI_MISO UR_DTR
GT1_CH1
PB15 34
I/O
5V-T
GPIO PB15
SPI_MOSI UR_RI
GT1_CH0
PB0
35
I/O
XTALIN
PB0
PB1
36
I/O
XTALOUT
PB1
VDD18
37
P
1.8 V voltage for core
N.C
38
PB2
39
I/O
GPIO PB2
CN0
GT1_CH0
PB3
40
I/O
GPIO PB3
CP0
GT1_CH1
PB4
41
I/O
GPIO PB4
AOUT0
UR_RTS/TXE GT1_CH2
PB5
42
I/O
GPIO PB5
CN1
GT1_CH3
PB6
43
I/O
GPIO PB6
CP1
GT1_ETI
PB7
44
I/O
GPIO PB7
AOUT1
UR_CTS/SCK GT0_ETI
VDD33_1
45
P
3.3 V voltage for digital I/O
VSS33_1
46
P
Ground reference for digital I/O
VDDA
47
P
3.3 V analog voltage for ADC and OPA/Comparator
VSSA_1
48
P
Ground reference for ADC and OPA/Comparator
NOTES: 1. I = input, O = output, P = power supply.
2. 5V-T = 5V tolerant.
3. HT32F1251B does not include the VBAT, XTAL32KIN and XTAL32KOUT pins.
4. The GPIOs are in AF0 state after VDD18 power on reset (POR) except the RTCOUT pin of Backup
Domain I/O. The RTCOUT pin is reset by the Backup Domain power-on-reset (PORB) or Backup
Domain software reset (BAK_RST bit in BAK_CR register).
5. The backup domain of I/O pins has driving current capability limitation (< 1mA @ VBAT = 3.3V).
Rev. 1.10
21 of 35
April 13, 2012
Share Link: 
