HT45FM03B View Datasheet(PDF) - Holtek Semiconductor
Part Name
Description
MFG CO.
'HT45FM03B' PDF : 83 Pages View PDF
HT45FM03B
Analog Comparator Interrupt Debounce Time
Control Register - DBTC
This register is used to provide control over the internal
Analog Comparator Interrupt debounce time, PWMxH
and PWMxL output control, INT0A, INT0B and INT0C
pin-shared output disable control and PWMxH/PWMxL
full active/inactive control.
Input/Output Ports
Holtek microcontrollers offer considerable flexibility on
their I/O ports. With the input or output designation of
every pin fully under user program control, pull-high op-
tions for most pins and wake-up options on certain pins,
the user is provided with an I/O structure to meet the
needs of a wide range of application possibilities.
The device provides 26 bidirectional input/output lines
labeled with port names PA, PB, PC and PD. These I/O
ports are mapped to the RAM Data Memory with spe-
cific addresses as shown in the Special Purpose Data
Memory table. All of these I/O ports can be used for in-
put and output operations. For input operation, these
ports are non-latching, which means the inputs must be
ready at the T2 rising edge of instruction ²MOV A,[m]²,
where m denotes the port address. For output opera-
tion, all the data is latched and remains unchanged until
the output latch is rewritten.
Pull-high Resistors
Many product applications require pull-high resistors for
their switch inputs usually requiring the use of an exter-
nal resistor. To eliminate the need for these external re-
sistors, all I/O pins, when configured as an input have
the capability of being connected to an internal pull-high
resistor. These pull-high resistors are selectable via
configuration options and are implemented using a
weak PMOS transistor.
Port A Wake-up
The HALT instruction forces the microcontroller into a
Power Down condition which preserve power, a feature
that is important for battery and other low-power appli-
cations. Various methods exist to wake-up the
microcontroller, one of which is to change the logic con-
dition on one of the Port A pins from high to low. After a
²HALT² instruction forces the microcontroller into enter-
ing a Power Down condition, the processor will remain
idle or in a low-power state until the logic condition of the
selected wake-up pin on Port A changes from high to
low. This function is especially suitable for applications
that can be woken up via external switches. Note that
each pin on Port A can be selected individually to have
this wake-up feature.
I/O Port Control Registers
Each I/O port has its own control register PAC, PBC,
PCC and PDC, to control the input/output configuration.
With this control register, each CMOS output or input
with or without pull-high resistor structures can be re-
configured dynamically under software control. Each pin
of the I/O ports is directly mapped to a bit in its associ-
ated port control register. For the I/O pin to function as
an input, the corresponding bit of the control register
must be written as a ²1². This will then allow the logic
state of the input pin to be directly read by instructions.
When the corresponding bit of the control register is writ-
ten as a ²0², the I/O pin will be setup as a CMOS output.
If the pin is currently setup as an output, instructions can
still be used to read the output register. However, it
should be noted that the program will in fact only read
the status of the output data latch and not the actual
logic status of the output pin.
Pin-shared Functions
The flexibility of the microcontroller range is greatly en-
hanced by the use of pins that have more than one func-
tion. Limited numbers of pins can force serious design
constraints on designers but by supplying pins with
multi-functions, many of these difficulties can be over-
come. For some pins, the chosen function of the
multi-function I/O pins is set by configuration options
while for others the function is set by application pro-
gram control.
· External Interrupt 0 Input
The external interrupt pins INT0A, INT0B and INT0C
are pin-shared with the I/O pins PA4~PA6 or PB4~PB6.
The function is chosen using configuration options. For
applications not requiring these external interrupt in-
puts, the pin-shared external interrupt pins can be used
as normal I/O pins, however to do this, the external in-
terrupt 0 enable bits in the INTC0 register must be dis-
abled. To configure them to operate as external
interrupt inputs, the corresponding bits in the interrupt
control register must be correctly set and the pins must
be setup as inputs. Note that the original I/O function
will remain even if these pins are setup to be used as
external interrupt 0 inputs. The INT0A, INT0B and
INT0C pins can be selected as input line only by soft-
ware. If the HSIC is 1, the INT0A, INT0B and INT0C pin
shared I/O output function are disabled and these I/O
can be input only and without pull-high resistor.
· External Interrupt 1 Input
The external interrupt pin INT1 is pin-shared with the
I/O pin PA7. For applications not requiring an INT1 in-
put, the pin can be used as a normal I/O pin, however
to do this, the external interrupt 1 enable bits in the
INTC0 register must be disabled. To configure it to op-
erate as an external interrupt 1 input, the correspond-
ing bits in the interrupt control register must be
correctly set and the pin must be setup as an input.
Note that the original I/O function will remain even if
the pin is setup to be used as an external interrupt.
Rev. 1.10
19
May 7, 2010
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