HT48CA5 View Datasheet(PDF) - Holtek Semiconductor
Part Name
Description
MFG CO.
'HT48CA5' PDF : 38 Pages View PDF
V DD
5 .5 V
V LV R
0 .9 V
0V
R e s e t S ig n a l
HT48RA5/HT48CA5
L V R D e te c t V o lta g e
R eset
N o r m a l O p e r a tio n
R eset
*1
*2
Low Voltage Reset
Note:
²*1² To make sure that the system oscillator has stabilized, the SST provides an extra delay of 1024 system
clock pulses before entering the normal operation.
²*2² Since low voltage has to be maintained in its original state and exceed 1ms, therefore 1ms delay enters
the reset mode.
Options
The following table shows all kinds of code option in the MCU. All of the mask options must be defined to ensure proper
system functioning.
Function
PA0~PA7 wake-up enable or disable options
PC pull-high enable or disable
PA pull-high enable or disable: Byte option
PF pull-high enable or disable
PB pull-high (PB0~PB3, PB4~PB7) enable or disable: Nibble option
PB0 or PFD
CLR WDT instructions
System oscillators: RC or crystal
WDT enable or disable
WDT clock source: WDTOSC or system clock/4
LVR function: enable or disable
LVR voltage: 2.0V or 3.0V
Rev. 1.40
18
May 22, 2009
Share Link: 
