HT48R01B-1 View Datasheet(PDF) - Holtek Semiconductor
Part Name
Description
MFG CO.
'HT48R01B-1' PDF : 71 Pages View PDF
HT46R01B-1/HT46R01N-1
HT48R01B-1/HT48R01N-1
The following diagram illustrates the addressing/data
flow of the look-up table:
Lastpage or
p re s e n t p a g e
P C 9~P C 8
P C H ig h B y te
T B L P R e g is te r
P ro g ra m M e m o ry
D a ta
1 5 b its
R e g is te r T B L H
H ig h B y te
U s e r S e le c te d
R e g is te r
L o w B y te
Table Program Example
The accompanying example shows how the table
pointer and table data is defined and retrieved from the
device. This example uses raw table data located in the
last page which is stored there using the ORG state-
ment. The value at this ORG statement is ²300H² which
refers to the start address of the last page within the 1K
Program Memory of the device. The table pointer is
setup here to have an initial value of ²06H². This will en-
sure that the first data read from the data table will be at
the Program Memory address ²306H² or 6 locations af-
ter the start of the last page. Note that the value for the
table pointer is referenced to the first address of the
present page if the ²TABRDC [m]² instruction is being
used. The high byte of the table data which in this case
is equal to zero will be transferred to the TBLH register
automatically when the ²TABRDL [m]² instruction is ex-
ecuted.
Because the TBLH register is a read-only register and
cannot be restored, care should be taken to ensure its
protection if both the main routine and Interrupt Service
Routine use the table read instructions. If using the table
read instructions, the Interrupt Service Routines may
change the value of TBLH and subsequently cause er-
rors if used again by the main routine. As a rule it is rec-
ommended that simultaneous use of the table read
instructions should be avoided. However, in situations
where simultaneous use cannot be avoided, the inter-
rupts should be disabled prior to the execution of any
main routine table-read instructions. Note that all table
related instructions require two instruction cycles to
complete their operation.
Table Location Bits
Instruction
b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
TABRDC [m]
PC9 PC8 @7
@6
@5
@4
@3
@2
@1
@0
TABRDL [m]
1
1
@7
@6
@5
@4
@3
@2
@1
@0
Note:
Table Location
PC9~PC8: Current program Counter bits
@7~@0: Table Pointer TBLP bits
· Table Read Program Example - 1K ROM size
tempreg1 db ?
tempreg2 db ?
:
:
; temporary register #1
; temporary register #2
mov a,06h
; initialise table pointer - note that this address is referenced
mov tblp,a
:
:
; to the last page or present page
tabrdl tempreg1 ; transfers value in table referenced by table pointer to tempregl
; data at prog. memory address ²306H² transferred to tempreg1 and TBLH
dec tblp
; reduce value of table pointer by one
tabrdl
:
:
tempreg2
; transfers value in table referenced by table pointer to tempreg2
; data at prog.memory address ²305H² transferred to tempreg2 and TBLH
; in this example the data ²1AH² is transferred to
; tempreg1 and data ²0FH² to register tempreg2
; the value ²00H² will be transferred to the high byte register TBLH
org 300h
; sets initial address of last page
dc 00Ah, 00Bh, 00Ch, 00Dh, 00Eh, 00Fh, 01Ah, 01Bh
:
:
Rev.1.00
14
June 9, 2011
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