HT48R064G/065G/066G/0662G
Enhanced I/O Type 8-Bit OTP MCU with OPA
Ta=25°C
Symbol
Parameter
tSST
System Start-up time Period
Test Conditions
VDD
Conditions
For HXT/LXT
¾
For ERC/IRC
Min. Typ. Max. Unit
¾
128
¾
tSYS
¾
2
¾
tSYS
tINT
Interrupt Pulse Width
¾
¾
1
¾
¾
ms
tLVR
Low Voltage Width to Reset
¾
¾
0.25 1
2
ms
tRSTD Reset Delay Time
¾
¾
¾
50
¾
ms
Note:
1. tSYS=1/fSYS
2. *For fERC, as the resistor tolerance will influence the frequency a precision resistor is recommended.
3. To maintain the accuracy of the internal HIRC oscillator frequency, a 0.1mF decoupling capacitor should
be connected between VDD and VSS and located as close to the device as possible.
Power-on Reset Characteristics
Symbol
Parameter
Test Conditions
VDD
Conditions
VPOR
VDD Start Voltage to Ensure
Power-on Reset
¾
¾
RRVDD
VDD Rise Rate to Ensure
Power-on Reset
¾
¾
tPOR
Minimum Time for VDD to remain
at VPOR to Ensure Power-on Reset
¾
¾
Ta=25°C
Min.
Typ.
Max.
Unit
¾
¾
0.035
¾
1
¾
100
mV
¾
V/ms
¾
ms
V DD
tP O R
R R VDD
V POR
T im e
Rev. 1.10
19
October 23, 2012