HT49C10-1 View Datasheet(PDF) - Holtek Semiconductor
Part Name
Description
MFG CO.
'HT49C10-1' PDF : 38 Pages View PDF
HT49R10A-1/HT49C10-1
Configuration Options
The following shows the configuration options in the device. All these options should be defined in order to ensure
proper functioning system.
Options
OSC type selection.
This option is to determine whether an RC or crystal or 32768Hz crystal oscillator is chosen as the system clock.
WDT Clock source selection.
RTC and Time Base. There are three types of selection: system clock/4 or RTC OSC or WDT OSC.
WDT enable/disable selection.
WDT can be enabled or disabled by configuration options.
CLR WDT times selection.
This option defines how to clear the WDT by instruction. ²One time² means that the ²CLR WDT² can clear the WDT.
²Two times² means that if both of the ²CLR WDT1² and ²CLR WDT2² have been executed, only then will the WDT be
cleared.
Time Base time-out period selection.
The Time Base time-out period ranges from clock/212 to clock/215 ²Clock² means the clock source selected by
configuration option.
Buzzer output frequency selection.
There are eight types of frequency signals for the buzzer output: Clock/22~Clock/29. ²Clock² means the clock source
selected by configuration option.
Wake-up selection.
This option defines the wake-up capability. External I/O pins (PA only) all have the capability to wake-up the chip
from a HALT by a falling edge.
Pull-high selection.
This option is to decide whether the pull-high resistance is visible or not on PA0~PA3. (PB and PA4~PA7 are always
pull-high)
PA0~PA3 CMOS or NMOS selection.
The structure of PA0~PA3 4 bits can be selected as CMOS or NMOS individually. When the CMOS is selected, the
related pins only can be used for output operations. When the NMOS is selected, the related pins can be used for
input or output operations. (PA4~PA7 are always NMOS)
Clock source selection of timer/event counter.
There are two types of selection: system clock or system clock/4.
I/O pins share with other functions selection.
PA0/BZ, PA1/BZ: PA0 and PA1 can be set as I/O pins or buzzer outputs.
PA3/PFD: PA3 can be set as I/O pins or PFD output.
LCD common selection.
There are three types of selection: 2 common (1/2 duty) or 3 common (1/3 duty) or 4 common (1/4 duty). If the 4
common is selected, the segment output pin ²SEG14² will be set as a common output.
LCD bias power supply selection.
There are two types of selection: 1/2 bias or 1/3 bias
LCD bias type selection.
This configuration option is to determine what kind of bias is selected, R type or C type.
LCD driver clock selection.
There are seven types of frequency signals for the LCD driver circuits: fS/22~fS/28.
²fS² means the clock source selection by configuration option.
LCD ON/OFF at HALT selection.
LVR selection.
LVR has an enable or disable option.
LVD selection.
LVD has an enable or disable option.
LVD/LVR voltage selection.
There are three levels of selection: 2.2V/2.1V, 3.3V/3.15V or 4.4V/4.2V
Rev. 1.50
21
July 30, 2012
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