HT49CA1 View Datasheet(PDF) - Holtek Semiconductor
Part Name
Description
MFG CO.
'HT49CA1' PDF : 58 Pages View PDF
HT49RA1/HT49CA1
· Location 00CH
This internal vector is used by the Timer/Event Coun-
ter 0. If a counter overflow occurs, the program will
jump to this location and begin execution if the
timer/event counter interrupt is enabled and the stack
is not full.
· Location 010H
This internal vector is used by the Timer/Event Coun-
ter 1. If a counter overflow occurs, the program will
jump to this location and begin execution if the
timer/event counter interrupt is enabled and the stack
is not full.
· Location 014H
This internal vector is used by the Time Base interrupt.
If a Time Base interrupt occurs, the program will jump
to this location and begin execution if the time base in-
terrupt is enabled and the stack is not full.
· Location 018H
This internal vector is used by the Real Time Clock in-
terrupt. The program will jump to this location and be-
gin execution when a Real Time Clock interrupt signal
is generated if the interrupt is enabled and the stack is
not full.
Look-up Table
Any location within the Program Memory can be defined
as a look-up table where programmers can store fixed
data. To use the look-up table, the table pointer must
first be setup by placing the lower order address of the
look up data to be retrieved in the table pointer register,
TBLP. This register defines the lower 8-bit address of
the look-up table.
After setting up the table pointer, the table data can be
retrieved from the current Program Memory page or last
Program Memory page using the ²TABRDC[m]² or
²TABRDL [m]² instructions, respectively. When these in-
structions are executed, the lower order table byte from
the Program Memory will be transferred to the user de-
fined Data Memory register [m] as specified in the in-
struction. The higher order table data byte from the
Program Memory will be transferred to the TBLH special
register. Any unused bits in this transferred higher order
byte will be read as ²0².
The following diagram illustrates the addressing/data
flow of the look-up table:
P ro g ra m C o u n te r
H ig h B y te
TB LP
P ro g ra m
M e m o ry
TB LH
T a b le C o n te n ts H ig h B y te
S p e c ifie d b y [m ]
T a b le C o n te n ts L o w B y te
Table Program Example
The following example shows how the table pointer and
table data is defined and retrieved from the HT49RA1
microcontroller. This example uses raw table data lo-
cated in the last page which is stored there using the
ORG statement. The value at this ORG statement is
²F00H² which refers to the start address of the last page
within the 4K Program Memory of the HT49RA1
microcontroller. The table pointer is setup here to have
an initial value of ²06H². This will ensure that the first
data read from the data table will be at the Program
Memory address ²F06H² or 6 locations after the start of
the last page. Note that the value for the table pointer is
referenced to the first address of the present page if the
²TABRDC [m]² instruction is being used. The high byte
of the table data which in this case is equal to zero will
be transferred to the TBLH register automatically when
the ²TABRDL [m]² instruction is executed.
Because the TBLH register is a read-only register and
cannot be restored, care should be taken to ensure its
protection if both the main routine and Interrupt Service
Routine use table read instructions. If using the table
read instructions, the Interrupt Service Routines may
change the value of the TBLH and subsequently cause
errors if used again by the main routine. As a rule it is
recommended that simultaneous use of the table read
instructions should be avoided. However, in situations
where simultaneous use cannot be avoided, the inter-
rupts should be disabled prior to the execution of any
main routine table-read instructions. Note that all table
related instructions require two instruction cycles to
complete their operation.
Table Location Bits
Instruction
b11 b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0
TABRDC [m] PC11 PC10 PC9 PC8 @7 @6 @5 @4 @3 @2 @1 @0
TABRDL [m] 1
1
1
1
@7 @6 @5 @4 @3 @2 @1 @0
Table Location
Note:
PC11~PC8: Current Program Counter bits
@7~@0: Table Pointer TBLP bits
The table address location is 12 bits, i.e. from b11~b0.
Rev. 1.10
9
March 30, 2014
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