HT49R10A-1 View Datasheet(PDF) - Holtek Semiconductor
Part Name
Description
MFG CO.
'HT49R10A-1' PDF : 38 Pages View PDF
HT49R10A-1/HT49C10-1
When the device operates in a noisy environment, using
the on-chip RC oscillator (WDT OSC) is strongly recom-
mended, since the HALT instruction will stop the system
clock.
The WDT overflow under normal operation initializes a
²chip reset² and sets the status bit ²TO². In the HALT
mode, the overflow initializes a ²warm reset², and only
the program counter and stack pointer are reset to zero.
To clear the contents of the WDT, there are three meth-
ods to be adopted, i.e., external reset (a low level to
RES), software instruction, and a ²HALT² instruction.
There are two types of software instructions; ²CLR
WDT² and the other set - ²CLR WDT1² and ²CLR
WDT2². Of these two types of instruction, only one type
of instruction can be active at a time depending on the
options - ²CLR WDT² times selection option. If the
²CLR WDT² is selected (i.e., CLR WDT times equal
one), any execution of the ²CLR WDT² instruction clears
the WDT. In the case that ²CLR WDT1² and ²CLR
WDT2² are chosen (i.e., CLR WDT times equal two),
these two instructions have to be executed to clear the
WDT; otherwise, the WDT may reset the chip due to a
time-out.
Multi-function Timer
The device provides a multi-function timer for the WDT,
time base and RTC but with different time-out periods.
The multi-function timer consists of an 8-stage divider
and a 7-bit prescaler, with the clock source coming from
the WDT OSC or RTC OSC or the instruction clock (i.e.,
system clock divided by 4). The multi-function timer also
provides a selectable frequency signal (ranges from
fS/22 to fS/28) for LCD driver circuits, and a selectable fre-
quency signal (ranges from fS/22 to fS/29) for the buzzer
output by configuration options. It is recommended to
select a frequency as new as possible to 4kHz for the
LCD driver circuits for a proper display.
Time Base
The time base offers a periodic time-out period to gener-
ate a regular internal interrupt. Its time-out period
ranges from fS/212 to fS/215 selected by a configuration
option. If a time base time-out occurs, the related inter-
rupt request flag (TBF; bit 6 of INTC0) is set. If the inter-
rupt is enabled, and the stack is not full, a subroutine call
to location 0CH occurs.
Real Time Clock - RTC
The real time clock (RTC) is operated in the same
manner as the time base that is used to supply a regular
internal interrupt. Its time-out period ranges from fS/28 to
fS/215 by software programming . Writing data to RT2,
RT1 and RT0 (bit2, 1, 0 of RTCC;09H) yields various
S y s te m C lo c k /4
R TC
O SC
32768H z
W
O
D
S
T
C
12kH
z
O p tio n fS
S e le c t
fs
D iv id e r
D iv id e r
CK T
CK T
R
R
W D T C le a r
Watchdog Timer
D iv id e r
P r e s c a le r
T im e - o u t R e s e t fS /2 1 5 ~ fS /2 1 6
Rev. 1.50
O p tio n
O p tio n
L C D D riv e r (fS /2 2~ fS /2 8)
B u z z e r (fS /2 2~ fS /2 9)
T im e B a s e In te rru p t
fS /2 12~ fS /2 15
Time Base
fS
D iv id e r
P r e s c a le r
R T2
8 to 1
R T1
R T0
M ux.
Real Time Clock
fS /2 8~ fS /2 15
R T C In te rru p t
13
July 30, 2012
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