HT49R10A-1 View Datasheet(PDF) - Holtek Semiconductor
Part Name
Description
MFG CO.
'HT49R10A-1' PDF : 38 Pages View PDF
HT49R10A-1/HT49C10-1
The functional unit chip reset status is shown below.
Program Counter
000H
Interrupt
Disabled
Prescaler, Divider Cleared
WDT, RTC,
Time Base
Cleared. After master reset,
WDT starts counting
Timer/Event Counter Off
Input/output Ports Input mode
Stack Pointer
Points to the top of the stack
VDD
RES
S S T T im e - o u t
C h ip R e s e t
tS S T
Reset Timing Chart
H A LT
W DT
RES
W DT
T im e - o u t
R eset
O SC1
SST
1 0 - b it R ip p le
C o u n te r
E x te rn a l
W a rm R e s e t
C o ld
R eset
P o w e r - o n D e te c tio n
Reset Configuration
V DD
100kW
0 .1 m F
RES
B a s ic
R eset
C ir c u it
V DD
0 .0 1 m F
100kW
10kW
0 .1 m F
RES
H i-n o is e
R eset
C ir c u it
Reset Circuit
Note: Most applications can use the Basic Reset Circuit
as shown, however for applications with extensive noise,
it is recommended to use the Hi-noise Reset Circuit.
The states of the registers are summarized below:
Register
Reset
WDT Time-out
RES Reset
RES Reset WDT Time-out
(Power On) (Norma Operation) (Normal Operation) (HALT)
(HALT)*
TMR
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
uuuu uuuu
TMRC
0000 1---
0000 1---
0000 1---
0000 1---
uuuu u---
Program Counter
0000H
0000H
0000H
0000H
0000H
MP0
1xxx xxxx
1uuu uuuu
1uuu uuuu
1uuu uuuu 1uuu uuuu
MP1
1xxx xxxx
1uuu uuuu
1uuu uuuu
1uuu uuuu 1uuu uuuu
BP
---- ---0
---- ---0
---- ---0
---- ---0
---- ---u
ACC
xxxx xxxx
uuuu uuuu
uuuu uuuu
uuuu uuuu uuuu uuuu
TBLP
xxxx xxxx
uuuu uuuu
uuuu uuuu
uuuu uuuu uuuu uuuu
TBLH
--xx xxxx
--uu uuuu
--uu uuuu
--uu uuuu
--uu uuuu
STATUS
--00 xxxx
--1u uuuu
--uu uuuu
--01 uuuu
--11 uuuu
INTC0
-000 0000
-000 0000
-000 0000
-000 0000
-uuu uuuu
INTC1
---0 ---0
---0 ---0
---0 ---0
---0 ---0
---u ---u
RTCC
--00 0111
--00 0111
--00 0111
--00 0111
--uu uuuu
PA
1111 1111
1111 1111
1111 1111
1111 1111 uuuu uuuu
PB
---- -r-r
---- -r-r
---- -r-r
---- -r-r
---- -r-r
Note: ²*² stands for warm reset
²u² stands for unchanged
²x² stands for unknown
²-² stands for unimplemented
²r² stands for PB input bit 0 and bit 2 are read only
Rev. 1.50
15
July 30, 2012
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