HT56R24 View Datasheet(PDF) - Holtek Semiconductor
Part Name
Description
MFG CO.
'HT56R24' PDF : 134 Pages View PDF
HT56R22/HT56R23/HT56R24/HT56R25/HT56R26
LXT Oscillator Low Power Function
The LXT oscillator can function in one of two modes, the
Quick Start Mode and the Low Power Mode. The mode
selection is executed using the QOSC bit in the RTCC
register.
QOSC Bit
0
1
LXT Mode
Quick Start
Low-power
After power on the QOSC bit will be automatically
cleared to zero ensuring that the LXT oscillator is in the
Quick Start operating mode. In the Quick Start Mode the
LXT oscillator will power up and stabilise quickly. How-
ever, after the LXT oscillator has fully powered up it can
be placed into the Low-power mode by setting the
QOSC bit high. The oscillator will continue to run but
with reduced current consumption, as the higher current
consumption is only required during the LXT oscillator
start-up. In power sensitive applications, such as battery
applications, where power consumption must be kept to
a minimum, it is therefore recommended that the appli-
cation program sets the QOSC bit high about 2 seconds
after power-on.
It should be noted that, no matter what condition the
QOSC bit is set to, the LXT oscillator will always function
normally, the only difference is that it will take more time
to start up if in the Low-power mode.
Internal Low Speed Oscillator - LIRC
When microcontrollers enter a power down condition,
their internal clocks are normally switched off to stop
microcontroller activity and to conserve power. How-
ever, in many microcontroller applications it may be nec-
essary to keep some internal functions operational,
such as timers, even when the microcontroller is in the
Power-down mode. To do this, the device has a LIRC
oscillator, which is a fully integrated free running RC os-
cillator with a typical period of 31.2 s at 5V, requiring no
external components. It is selected via configuration op-
tion. When the device enters the Power Down Mode, the
system clock will stop running, however the LIRC oscil-
lator will continue to run if selected to keep various inter-
nal functions operational.
System Operating Modes
The devices have the ability to operate in several differ-
ent modes. This range of operating modes, known as
Normal Mode, Slow Mode, Idle Mode and Sleep Mode,
allow the devices to run using a wide range of different
slow and fast clock sources. The devices also possess
the ability to dynamically switch between different clocks
and operating modes. With this choice of operating
functions users are provided with the flexibility to ensure
they obtain optimal performance from the device ac-
cording to their application specific requirements.
Clock Sources
In discussing the system clocks for the devices, they
can be seen as having a dual clock mode. These dual
clocks are what are known as a High Oscillator and the
other as a Low Oscillator. The High and Low Oscillator
are the system clock sources and can be selected dy-
namically using the HLCLK bit in the CLKMOD register.
The High Oscillator has the internal name fM whose
source is selected using a configuration option from a
choice of either an external crystal/resonator, external
RC oscillator or external clock source.
The Low Oscillator clock source, has the internal name
fSL, whose source is also selected by configuration op-
tion. This internal fSL, fM clock, is further modified by the
SLOWC0~SLOWC2 bits in the CLKMOD register to
provide the low frequency clock source fSLOW.
An additional sub internal clock, with the internal name
fSUB, is a 32kHz clock source which can be sourced from
either LXT or LIRC, selected by configuration option. To-
gether with fSYS/4, it is used as a clock source for certain
internal functions such as the LCD driver, Watchdog
Timer, Buzzer, RTC Interrupt and Time Base Interrupt.
The LCD clock source is the fSUB clock source divided by
8, giving a frequency of 4kHz. The internal clock fS, is
simply a choice of either fSUB or fSYS/4, using a configura-
tion option.
Operating Modes
After the correct clock source configuration selections
are made, overall operation of the chosen clock is
achieved using the CLKMOD register. A combination of
the HLCLK and IDLEN bits in the CLKMOD register and
use of the HALT instruction determine in which mode the
device will be run. The devices can operate in the follow-
ing Modes.
· Normal Mode
fM on, fSLOW on, fSYS=fM, CPU on, fS on, fWDT on/off de-
pending upon the WDT configuration option and WDT
control register.
· Slow Mode0
fM off, fSLOW=LXT or LIRC, fSYS=fSLOW, CPU on, fS on,
fWDT on/off depending upon the WDT configuration op-
tion and WDT control register.
· Slow Mode1
fM on, fSLOW=fM/2~fM/64, fSYS=fSLOW, CPU on, fS on, fWDT
on/off depending upon the WDT configuration option
and WDT control register.
· Idle Mode
fM, fSLOW, fSYS off, CPU off; fSUB on, fS on/off by selecting
fSUB or fSYS/4, fWDT on/off depending upon the WDT
configuration option and WDT control register.
Rev. 1.30
30
December 26, 2014
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