HT66F25D View Datasheet(PDF) - Holtek Semiconductor
Part Name
Description
MFG CO.
'HT66F25D' PDF : 177 Pages View PDF
A/D Flash Type 8-bit MCU with EEPROM
HT66F24D/HT66F25D
Reset Functions
There are five ways in which a microcontroller reset can occur, through events occurring both
internally and externally:
Power-on Reset
The most fundamental and unavoidable reset is the one that occurs after power is first applied to
the microcontroller. As well as ensuring that the Program Memory begins execution from the first
memory address, a power-on reset also ensures that certain other registers are preset to known
conditions. All the I/O port and port control registers will power up in a high condition ensuring that
all pins will be first set to inputs.
VDD
0 .9 V D D
RES
t RR SS TT DD ++ t SS SS TT
In te rn a l R e s e t
Power-On Reset Timing Chart
Note: tRSTD is power-on delay, typical time=50ms
Low Voltage Reset – LVR
The microcontroller contains a low voltage reset circuit in order to monitor the supply voltage of the
device. The LVR function is always enabled with a specific LVR voltage VLVR. If the supply voltage
of the device drops to within a range of 0.9V~VLVR such as might occur when changing the battery,
the LVR will automatically reset the device internally and the LVRF bit in the CTRL register will
also be set to 1. For a valid LVR signal, a low supply voltage, i.e., a voltage in the range between
0.9V~VLVR must exist for a time greater than that specified by tLVR in the A.C. characteristics. If the
low supply voltage state does not exceed this value, the LVR will ignore the low supply voltage and
will not perform a reset function. The actual VLVR value can be selected by the LVS bits in the LVRC
register. If the LVS7~LVS0 bits are changed to some certain values by the environmental noise, the
LVR will reset the device after 2~3 LIRC clock cycles. When this happens, the LRF bit in the CTRL
register will be set to 1. After power on the register will have the value of 01010101B. Note that the
LVR function will be automatically disabled when the device enters the power down mode.
LV R
tR S T D + tS S T
In te rn a l R e s e t
Low Voltage Reset Timing Chart
Note: tRSTD is power-on delay, typical time=100ms
Rev. 1.10
53
March 25, 2013
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