HT82K94E View Datasheet(PDF) - Holtek Semiconductor
Part Name
Description
MFG CO.
'HT82K94E' PDF : 43 Pages View PDF
HT82K94E/HT82K94A
Bit No. Label R/W
Function
0, 2
¾
¾ Undefined, should be cleared to ²0²
1
OSC_ctrl
R/W
1: High driver of oscillator circuit for low voltage
0: normal driver of oscillator circuit
3
USBCKEN
R/W
USB clock control bit. When this bit is set to ²1², it indicates that the USB clock is en-
abled. Otherwise, the USB clock is turned-off. (Default=²0²)
This bit is used to reduce power consumption in the suspend mode. In the normal
4
SUSPEND2
R/W
mode this bit must be cleared to zero(Default=²0²). In the HALT mode this bit should
be set high to reduce power consumption and LVR with no function. In the USB
mode this bit cannot be set high.
This flag is used to show the MCU is under PS2 mode. (Bit=1)
5
PS2_flag R/W This bit is R/W by FW and will be cleared to ²0² after power-on reset. (Default=²0²)
This bit is used to specify the system oscillator frequency used by the MCU. If a
6
SYSCLK R/W 6MHz crystal oscillator or resonator is used, this bit should be set to ²1². If a 12MHz
crystal oscillator or resonator is used, this bit should be cleared to ²0² (default).
7
LVD
R/W
1: battery voltage low
0: battery voltage high
SCC (1EH) Register
Table High Byte Pointer for Current Table Read TBHP (Address 0X1F)
Register
Bits
Labels Read/Write Option
Functions
(0X1F)
4~0
PGC4~PGC0
R/W
¾
Store current table read bit12~bit8 data
Options
The following table shows all kinds of option in the microcontroller. All of the options must be defined to ensure proper
system functioning.
No.
Option
1
Chip lock bit (by bit)
2
PA0~PA7 pull-high resistor enabled or disabled (by bit)
3
PB0~PB7 pull-high resistor enabled or disabled (by nibble)
4
PC0~PC7 pull-high resistor enabled or disabled (by nibble)
5
PD0~PD7 pull-high resistor enabled or disabled (by nibble)
6
PE0~PE7 pull-high resistor enabled or disabled (by nibble)
7
LVR enable or disable
8
WDT enable or disable
9
WDT clock source: fSYS/4 or WDTOSC
10 ²CLRWDT² instruction(s): 1 or 2
11 PA0~PA7 output structures: CMOS/NMOS open-drain/PMOS open-drain (by bit)
12 PA0~PA7 wake-up enabled or disabled (by bit)
13 PB0~PB7 wake-up enabled or disabled (by nibble)
14 PC0~PC7 wake-up enabled or disabled (by nibble)
15 PD0~PD7 wake-up enabled or disabled (by nibble)
16 TBHP enable or disable (default disable)
17 LVR/LVD kind: 2-battery or 3-battery
Rev. 1.50
23
October 11, 2007
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