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ICS1892Y-10 View Datasheet(PDF) - Integrated Circuit Systems

Part Name
Description
MFG CO.
ICS1892Y-10
ICST
Integrated Circuit Systems ICST
'ICS1892Y-10' PDF : 148 Pages View PDF
ICS1892 Data Sheet
Chapter 2 Conventions and Nomenclature
Table 2-1. Conventions and Nomenclature (Continued)
Item
Registers
Signal references
Symbols
Convention / Nomenclature
A bit in a register is identified using the format ‘register.bit’. For example, bit
0.15 is bit 15 of register 0.
All numerical references to registers use decimal notation (and not
hexadecimal).
When register name abbreviations are spelled out, words in parentheses
indicate additional description that is not part of the register name
abbreviation.
When referring to signals, the terms:
– ‘FALSE’, ‘low’, or ‘zero’ represent signals that are logic zero.
– ‘TRUE’, ‘high’, or ‘one’ represent signals that are logic one.
Chapter 10, “DC and AC Operating Conditions” defines the electrical
specifications for ‘logic zero’ and ‘logic one’ signals.
In this data sheet, code group names are referred to as ‘symbols’ and they
are shown between '/' (slashes). For example, the symbol /J/ represents
the first half of the Start-of-Stream Delimiter (SSD1).
Symbol sequences are shown in succession. For example, /I/J/K/
represents an IDLE followed by the SSD.
Terms:
‘set’,
‘active’,
‘asserted’,
The terms ‘set’, ‘active’, and ‘asserted’ are synonymous.
They do not necessarily infer logic one.
(For example, an active-low signal can be set to logic zero.)
Terms:
‘cleared’,
‘de-asserted’,
‘inactive’
The terms ‘cleared’, ‘inactive’, and ‘de-asserted’ are synonymous.
They do not necessarily infer logic zero.
Terms:
‘twisted-pair receiver’
In reference to the ICS1892, the term ‘Twisted-Pair Receiver’ refers to the set
of Twisted-Pair Receive output pins (TP_RXP and TP_RXN).
Terms:
In reference to the ICS1892, the term ‘Twisted-Pair Transmitter’ refers to the
‘twisted-pair transmitter’ set of Twisted-Pair Transmit output pins (TP_TXP and TP_TXN).
ICS1892, Rev. D, 2/26/01
© 2000-2001, Integrated Circuit Systems, Inc.
All rights reserved.
12
February 26, 2001
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