ICS1893AG Data Sheet - Preliminary
Chapter 6 Interface Overviews
Figure 6-4 shows typical biasing and LED connections for the ICS1893AG.
Figure 6-4. ICS1893AG LED - PHY Interface
ICS1893AG
P4RD
8
REC
P3TD
6
TRANS
P2LI
4
LINK
P1CL
3
COL
P0AC
1
ACTIVITY
10KΩ
10KΩ
LED 10KΩ LED 10KΩ
VDD
1KΩ
1KΩ
1KΩ
LED 10KΩ
This circuit decodes to PHY address = 1.
Notes:
1. All LED pins must be set during reset.
2. Caution: PHY address 00 tri-states the MII interface. Don’t use PHY address 00.
3. For more reliable address capture during power-on reset, add a 10KΩ resistor across
the LED.
ICS1893AG, Rev. A 04/14/05
Copyright © 2005, Integrated Circuit Systems, Inc.
All rights reserved.
31
April, 2005