ICS1893CY-10LF View Datasheet(PDF) - Integrated Circuit Systems
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MFG CO.
'ICS1893CY-10LF' PDF : 143 Pages View PDF
ICS1893CY-10 Data Sheet - Release
Chapter 4 Operating Modes Overview
Chapter 4 Operating Modes Overview
The ICS1893CY-10 operating modes and interfaces are configurable with one of two methods. The
HW/SW (hardware/software) pin determines which method the ICS1893CY-10 is to use, either its hardware
pins or its register bits. When the HW/SW bit is logic zero the ICS1893CY-10 is in hardware mode. In
hardware mode, the hardware pins have priority over the internal registers for establishing the configuration
settings of the ICS1893CY-10. When the HW/SW bit is logic one the ICS1893CY-10 is in software mode. In
software mode, the internal register bits have priority over the hardware pins for establishing the
configuration settings of the ICS1893CY-10. The register bits are typically controlled from software.
The ICS1893CY-10 register bits are accessible through a standard MII (Media Independent Interface)
Serial Management Port. Even when the ICS1893CY-10 MAC/Repeater Interface is not supporting the
standard MII Data Interface, access to the Serial Management Port is provided (that is, operation of the
Serial Management Port is independent of the MAC/Repeater Interface configuration).
The ICS1893CY-10 provides a number of configuration functions to support a variety of operations. For
example, the MAC/Repeater Interface can be configured to operate as a 10M MII, a 100M MII, a 100M
Symbol Interface, a 10M Serial Interface. The protocol on the Medium Dependent Interface (MDI) can be
configured to support either 10M or 100M operations in either half-duplex or full-duplex modes.
The ICS1893CY-10 is fully compliant with the ISO/IEC 8802-3 standard, as it pertains to both 10Base-T
and 100Base-TX operations. The feature-rich ICS1893CY-10 allows easy migration from 10-Mbps to
100-Mbps operations as well as from systems that require support of both 10M and 100M links.
This chapter is an overview of the following ICS1893CY-10 modes of operation:
• Section 4.1, “Reset Operations”
• Section 4.2, “Power-Down Operations”
• Section 4.3, “Automatic Power-Saving Operations”
• Section 4.4, “Auto-Negotiation Operations”
• Section 4.5, “100Base-TX Operations”
• Section 4.6, “10Base-T Operations”
• Section 4.7, “Half-Duplex and Full-Duplex Operations”
• Section 4.8, “Auto-MDI/MDIX Crossover (New)”
ICS1893CY-10 Rev 1/07
Copyright © 2007, Integrated Device Technology, Inc.
All rights reserved.
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