ICS601R-25LF View Datasheet(PDF) - Integrated Circuit Systems
Part Name
Description
MFG CO.
'ICS601R-25LF' PDF : 5 Pages View PDF
ICS601-25
LOW PHASE NOISE 1 TO 5 CLOCK MULTIPLIER
Pin Assignment
Output Select Table
X1/ICLK 1
VDD 2
S0 3
VDD 4
VDD 5
S1 6
GND 7
S3 8
PD 9
S2 10
20 X2
19 GND
18 VDD
17 CLK2
16 CLK3
15 GND
14 CLK4
13 CLK5
12 VDD
11 CLK1
20 Pin (150 mil) SSOP
Pin Descriptions
S3
S2
S1
S0
Multiplier
0
0
0
0
x1
0
0
0
1
x2
0
0
1
0
x3
0
0
1
1
x4
0
1
0
0
x5
0
1
0
1
x6
0
1
1
0
x8
0
1
1
1
x16
1
0
0
0
x7
1
0
0
1
x9
1
0
1
0
x10
1
0
1
1
x11
1
1
0
0
x12
1
1
0
1 output tristates
1
1
1
0
x14
1
1
1
1
x15
Pin
Number
1
2
3
4, 5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
Pin
Name
X1/ICLK
VDD
S0
VDD
S1
GND
S3
PD
S2
CLK1
VDD
CLK5
CLK4
GND
CLK3
CLK2
VDD
GND
X2
Pin
Type
XI
Power
Input
Power
Input
Power
Input
Input
Input
Output
Power
Output
Output
Power
Output
Output
Power
Power
XO
Pin Description
Crystal or clock input. Connect to a 10-27 MHz fundamental parallel mode
crystal or clock input.
Connect to +3.3 V.
Select pin 0. Internal pull-up.
Connect to +3.3 V.
Select pin 1. Internal pull-up.
Connect to ground.
Select pin 3. Internal pull-down.
Powerdown when held low. Internal pull-up.
Select pin 2. Internal pull-up.
Clock output.
Connect to +3.3 V.
Clock output.
Clock output.
Connect to ground.
Clock output.
Clock output.
Connect to +3.3 V.
Connect to ground.
Crystal connection. Connect to a 10-27 MHz fundamental parallel mode
crystal or leave unconnected for clock input.
MDS 601-25 C
2
Revision 071505
Integrated Circuit Systems ● 525 Race Street, San Jose, CA 95126 ● tel (408) 297-1201 ● www.icst.com
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