ICS662-03 View Datasheet(PDF) - Integrated Circuit Systems
Part Name
Description
MFG CO.
'ICS662-03' PDF : 6 Pages View PDF
ICS662-03
HDTV Audio/Video Clock Source
Description
The ICS662-03 provides synchronous clock generation
for audio sampling clock rates derived from an HDTV
stream. The device uses the latest PLL technology to
provide superior phase noise and long term jitter
performance. The device also supports a 27 MHz
output clock for video MPEG applications from an
HDTV reference clock.
Please contact ICS if you have a requirement for an
input and output frequency not included here.
Features
• Packaged in 8 pin SOIC
• HDTV clock input
• Low phase noise
• Exact (0 ppm) multiplication ratios
• Support for 256 and 384 times sampling rate
• Supports 27 MHz output for video (MPEG)
Block Diagram
VDD
SEL3:0
Control
Circuitry
PLL
Clock
CLK
Synthesis
REF_IN
GND
MDS 662-03 C
1
Revision 082003
Integrated Circuit Systems, Inc. ● 525 Race Street, San Jose, CA 95126 ● tel (408) 295-9800 ● www.icst.com
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