Integrated
Circuit
Systems, Inc.
ICS8308I
LOW SKEW, 1-TO-8
DIFFERENTIAL/LVCMOS-TO-LVCMOS FANOUT BUFFER
SCHEMATIC EXAMPLE
Figure 3 shows a schematic example of the ICS8308I. In this
example, the LVCMOS_CLK input is selected. The decoupling
capacitors should be physically located near the power pin.
VDD
VDD
R9 R10 R12
1K 1K 1K
VDD
Ro ~ 7 Ohm Zo = 50 Ohm
R11 43
3. 3V_LVC MOS
(U1,9) VDD (U1,12)
VDD=3.3V
(U1,16) (U1,20)
(U1,24)
C1
0. 1u
C2
0. 1u
C3
0. 1u
C4
0.1u
C5
0.1u
U1
1
2
3
Q0
GND
4
5
6
7
8
9
10
CLK_SEL
LVCMOS_CLK
CLK
nCLK
CLK_EN
OE
VDD
11
12
GND
Q1
VDDO
VDDO
Q2
24
23
22
GND
Q3
VDDO
Q4
GND
Q5
VDDO
21
20
19
18
17
16
15
Q6
GND
Q7
14
13
I C S8308I
R1
VDD
Zo = 50 Ohm
43
3.3V LVCMOS/LVTTL
Zo = 50 Ohm
R8 43
3.3V LVCMOS/LVTTL
FIGURE 3. ICS8308I LVPECL BUFFER SCHEMATIC EXAMPLE
RELIABILITY INFORMATION
TABLE 6. θJAVS. AIR FLOW TABLE FOR 24 LEAD TSSOP
θJA by Velocity (Linear Feet per Minute)
Multi-Layer PCB, JEDEC Standard Test Boards
0
70°C/W
200
63°C/W
500
60°C/W
TRANSISTOR COUNT
The transistor count for ICS8308I is: 1040
8308AGI
www.icst.com/products/hiperclocks.html
12
REV. B JULY 25, 2005