ICS8344BY View Datasheet(PDF) - Integrated Circuit Systems
Part Name
Description
MFG CO.
'ICS8344BY' PDF : 15 Pages View PDF
Integrated
Circuit
Systems, Inc.
PRELIMINARY
ICS8344
LOW SKEW, 1-TO-24
DIFFERENTIAL-TO-LVCMOS FANOUT BUFFER
TABLE 3A. OUTPUT ENABLE FUNCTION TABLE
Input
OE1
0
1
Bank 1
Output
Q0-Q7
Hi-Z
Active
Input
OE2
0
1
Bank 2
Output
Q8-Q15
Hi-Z
Active
Input
OE3
0
1
Bank 3
Output
Q16-Q23
Hi-Z
Active
TABLE 3B. CLOCK SELECT FUNCTION TABLE
Control Input
CLK_SEL
0
1
CLK0, nCLK0
Selected
De-selected
Clock
CLK1, nCLK1
De-selected
Selected
TABLE 3C. CLOCK INPUTS FUNCTION TABLE
OE1, OE2, OE3
Inputs
CLK
nCLK
Outputs
Q0 thru Q23
Input to Output Mode
Polarity
1
0
1
LOW
Differential to Single Ended Non Inverting
1
1
0
HIGH
Differential to Single Ended Non Inverting
1
0
Biased; NOTE 1
LOW
Single Ended to Differential Non Inverting
1
1
Biased; NOTE 1
HIGH
Single Ended to Differential Non Inverting
1
Biased; NOTE 1
0
HIGH
Single Ended to Differential
Inverting
1
Biased; NOTE 1
1
LOW
Single Ended to Differential
Inverting
NOTE 1: Single ended input use requires that one of the differential inputs be biased. The voltage at the biased input sets
the switch point for the single ended input. For LVCMOS input levels the recommended input bias network is a resistor to
VDDI, a resistor of equal value to ground and a 0.1µF capacitor from the input to ground. The resulting switch point is
VDDI/2.
8344
www.icst.com
3
REV. B FEBRUARY 2, 2001
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