ICS8501BYT View Datasheet(PDF) - Integrated Circuit Systems
Part Name
Description
MFG CO.
'ICS8501BYT' PDF : 11 Pages View PDF
Integrated
Circuit
Systems, Inc.
ICS8501
LOW SKEW, 1-TO-16 DIFFERENTIAL CURRENT MODE
FANOUT BUFFER
TABLE 1. PIN DESCRIPTIONS
Number
1, 11, 14, 24, 25, 35, 38, 48
2, 3
4, 5
6, 19, 30, 43
7, 8
9, 10
12
Name
VDD
Q11, nQ11
Q10, nQ10
GND
Q9, nQ9
Q8, nQ8
nc
13
RREF
15, 16
17, 18
20, 21
22, 23
26, 27
28, 29
36
37
39, 40
41, 42
44, 45
46, 47
Q7, nQ7
Q6, nQ6
Q5, nQ5
Q4, nQ4
Q3, nQ3
Q2, nQ2
CLK
nCLK
Q15, nQ15
Q14, nQ14
Q13, nQ13
Q12, nQ12
Type
Power
Output
Output
Power
Output
Output
Unused
Input
Output
Output
Output
Output
Output
Output
Input
Input
Output
Output
Output
Output
Description
Positive supply pins.
Differential output pair. Differential current mode interface levels.
Differential output pair. Differential current mode interface levels.
Power supply ground.
Differential output pair. Differential current mode interface levels.
Differential output pair. Differential current mode interface levels.
No connect.
Reference current input. Used to set the output current.
Connect to 475Ω resistor to ground.
Differential output pair. Differential current mode interface levels.
Differential output pair. Differential current mode interface levels.
Differential output pair. Differential current mode interface levels.
Differential output pair. Differential current mode interface levels.
Differential output pair. Differential current mode interface levels.
Differential output pair. Differential current mode interface levels.
Non inverting differential clock input.
Inverting differential clock input.
Differential output pair. Differential current mode interface levels.
Differential output pair. Differential current mode interface levels.
Differential output pair. Differential current mode interface levels.
Differential output pair. Differential current mode interface levels.
TABLE 2. PIN CHARACTERISTICS
Symbol
CIN
CPD
ROUT
Parameter
Input Capacitance
Power Dissipation Capacitance
(per output)
Output Impedance
Test Conditions
VDD = 3.465V, f = 250MHz
Minimum
Typical
2
4.6
14
Maximum Units
pF
pF
KW
TABLE 3. FUNCTION TABLE
Inputs
CLK
nCLK
Outputs
Q0:Q15
nQ0:nQ15
Input to Output Mode
Polarity
0
1
0
1
Differential to Differential
Non Inverting
1
0
1
0
Differential to Differential
Non Inverting
0
Biased; NOTE 1
0
1
Single Ended to Differential
Non Inverting
1
Biased; NOTE 1
1
0
Single Ended to Differential
Non Inverting
Biased; NOTE 1
0
1
0
Single Ended to Differential
Inverting
Biased; NOTE 1
1
0
1
Single Ended to Differential
Inverting
NOTE 1: Please refer to the Application Information Section, Wiring the Differential Input to Accept Single Ended Levels.
8501BY
www.icst.com/products/hiperclocks.html
2
REV. B OCTOBER 3, 2003
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