Integrated
Circuit
Systems, Inc.
ICS8521
LOW SKEW, 1-TO-9
DIFFERENTIAL-TO-HSTL FANOUT BUFFER
Rev Table
B
B
C
T4E
T2
D
T4B
D
T7
Page
3
3
5
2
4
8
9
4
9
14
REVISION HISTORY SHEET
Description of Change
Updated Figure 1 - CLK_EN Timing Diagram.
Updated Figure 1 - CLK_EN Timing Diagram.
LVHSTL table - changed VOH maximum from 1.2V to 1.4V.
Changed LVHSTL to HSTL throughout data sheet to conform with JEDEC
terminology.
Pin Characteristics table - changed CIN 4pF max. to 4pF typical.
LVCMOS table - changed VIH from 3.765V max. to VDD + 0.3V max.
Added Differential Input Interface section.
Added LVPECL Input Interface section.
Absolute Maximum Ratings - updated Output rating.
Updated LVPECL Clock Input Interface section.
Ordering Information - added "Lead-Free/Annealed" part number.
Date
10/16/01
11/1/01
01/02/03
7/16/03
7/7/04
8521BY
www.icst.com/products/hiperclocks.html
15
REV. D JULY 7, 2004