ICS8530DY View Datasheet(PDF) - Integrated Circuit Systems
Part Name
Description
MFG CO.
'ICS8530DY' PDF : 12 Pages View PDF
Integrated
Circuit
Systems, Inc.
ICS8530
LOW SKEW, 1-TO-16
DIFFERENTIAL-TO-2.5V LVPECL FANOUT BUFFER
GENERAL DESCRIPTION
The ICS8530 is a low skew, 1-to-16 Differential-
,&6
to-2.5V LVPECL Fanout Buffer and a member of
HiPerClockS™ the HiPerClockS™ family of High Performance
Clock Solutions from ICS. The CLK, nCLK pair
can accept most standard differential input lev-
els. The high gain differential amplifier accepts peak-to-peak
input voltages as small as 150mV, as long as the common
mode voltage is within the specified minimum and maximum
range.
Guaranteed output and part-to-part skew characteristics
make the ICS8530 ideal for those clock distribution applica-
tions demanding well defined performance and repeatability.
FEATURES
• 16 differential 2.5V LVPECL outputs
• CLK, nCLK input pair
• CLK, nCLK pair can accept the following differential input
levels: LVDS, LVPECL, LVHSTL, SSTL, HCSL
• Maximum output frequency up to 500MHz
• Translates any single-ended input signal to 2.5V LVPECL
levels with a resistor bias on nCLK input
• Output skew: 50ps (maximum)
• Part-to-part skew: 250ps (maximum)
• Propagation Delay: 2ns (maximum)
• 3.3V core, 2.5V output operating supply
• 0°C to 70°C ambient operating temperature
• Industrial temperature information available upon request
BLOCK DIAGRAM
CLK
nCLK
Q0
nQ0
Q1
nQ1
Q2
nQ2
Q3
nQ3
Q4
nQ4
Q5
nQ5
Q6
nQ6
Q7
nQ7
ICS8530DY
PIN ASSIGNMENT
Q15
nQ15
Q14
nQ14
Q13
nQ13
Q12
nQ12
Q11
nQ11
Q10
nQ10
Q9
nQ9
Q8
nQ8
VCCO
Q11
nQ11
Q10
nQ10
VEE
Q9
nQ9
Q8
nQ8
VCCO
VCC
48 47 46 45 44 43 42 41 40 39 38 37
1
36
2
35
3
34
4
33
5
32
6
7
ICS8530
31
30
8
29
9
28
10
27
11
26
12
25
13 14 15 16 17 18 19 20 21 22 23 24
CLK
VCCO
nQ0
Q0
nQ1
Q1
VEE
nQ2
Q2
nQ3
Q3
VCCO
48-Pin LQFP
7mm x 7mm x 1.4mm package body
Y Package
Top View
www.icst.com/products/hiperclocks.html
1
REV. C AUGUST 7, 2001
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