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ICS8531AY-01T View Datasheet(PDF) - Integrated Circuit Systems

Part Name
Description
MFG CO.
ICS8531AY-01T
ICST
Integrated Circuit Systems ICST
'ICS8531AY-01T' PDF : 13 Pages View PDF
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Integrated
Circuit
Systems, Inc.
ICS8531-01
LOW SKEW, 1-TO-9
DIFFERENTIAL-TO-3.3V LVPECL FANOUT BUFFER
GENERAL DESCRIPTION
The ICS8531-01 is a low skew, high performance
,&6
1-to-9 Differential-to-3.3V LVPECL Fanout Buffer
HiPerClockS™ a n d a m e m b e r o f t h e H i P e r C l o c k S ™
family of High Performance Clock Solutions from
ICS. The ICS8531-01 has two selectable clock
inputs. The CLK, nCLK pair can accept most standard
differential input levels. The PCLK, nPCLK pair can accept
LVPECL, CML, or SSTL input levels. The clock enable is
internally synchronized to eliminate runt pulses on the out-
puts during asynchronous assertion/deassertion of the clock
enable pin.
Guaranteed output skew and part-to-part skew characteris-
tics make the ICS8531-01 ideal for high performance work-
station and server applications.
FEATURES
9 differential 3.3V LVPECL outputs
Selectable CLK, nCLK or LVPECL clock inputs
CLK, nCLK pair can accept the following differential input
levels: LVDS, LVPECL, LVHSTL, SSTL, HCSL
PCLK, nPCLK supports the following input types:
LVPECL, CML, SSTL
Maximum output frequency up to 500MHz
Translates any single ended input signal (LVCMOS, LVTTL,
GTL) to 3.3V LVPECL levels with resistor bias on nCLK input
Output skew: 50ps (maximum)
Part-to-part skew: 250ps (maximum)
Propagation delay: 2ns (maximum)
3.3V operating supply
0°C to 70°C ambient operating temperature
Industrial temperature information available upon request
BLOCK DIAGRAM
CLK_EN
CLK
nCLK
0
PCLK
nPCLK
1
CLK_SEL
D
Q
LE
PIN ASSIGNMENT
32 31 30 29 28 27 26 25
Q0
nQ0
VCC 1
CLK 2
2 4 VCCO
23 Q3
Q1
nCLK 3
22 nQ3
nQ1
CLK_SEL 4
ICS8531-01 21 Q4
Q2
PCLK 5
20 nQ4
nQ2
nPCLK 6
19 Q5
Q3
nQ3
VEE 7
CLK_EN 8
18 nQ5
1 7 VCCO
Q4
nQ4
9 10 11 12 13 14 15 16
Q5
nQ5
32-Lead LQFP
Q6
7mm x 7mm x 1.4mm package body
nQ6
Y package
Q7
Top View
nQ7
Q8
nQ8
8531AY-01
www.icst.com/products/hiperclocks.html
1
REV. B AUGUST 9, 2001
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