ICS854057AGLF View Datasheet(PDF) - Integrated Circuit Systems
Part Name
Description
MFG CO.
ICS854057AGLF
Integrated Circuit Systems
'ICS854057AGLF' PDF : 13 Pages View PDF
Integrated
Circuit
Systems, Inc.
ICS854057
4:1 OR 2:1 LVDS CLOCK MULTIPLEXER
WITH INTERNAL INPUT TERMINATION
APPLICATION INFORMATION
2.5V LVDS DRIVER TERMINATION
Figure 1 shows a typical termination for LVDS driver in charac-
teristic impedance of 100Ω differential (50Ω single) transmis-
sion line environment. For buffer with multiple LDVS driver, it is
recommended to terminate the unused output.
2. 5V
LVDS_Driv er
2. 5V
+
R1
100
-
100 Ohm Differiential Transmission Line
FIGURE 1. TYPICAL LVDS DRIVER TERMINATION
2.5V DIFFERENTIAL INPUT WITH BUILT-IN 50Ω TERMINATION UNUSED INPUT HANDLING
To prevent oscillation and to reduce noise, it is recommended to
have pull up and pull down connected to true and complement of
the unused input as shown in Figure 2.
2.5V
2. 5V
R1
680
PCLK
VT
nPCLK
R2
680
Receiver
with
Built-In
50 Ohm
854057AG
FIGURE 2. UNUSED INPUT HANDLING
www.icst.com/products/hiperclocks.html
8
REV. A JULY 18, 2005
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